Merge remote-tracking branches 'regmap/topic/defaults', 'regmap/topic/irq' and 'regmap/topic/reg-params' into regmap-next
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commit
8ca006adef
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@ -131,7 +131,10 @@ struct regmap {
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struct reg_default *reg_defaults;
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const void *reg_defaults_raw;
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void *cache;
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/* if set, the cache contains newer data than the HW */
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u32 cache_dirty;
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/* if set, the HW registers are known to match map->reg_defaults */
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bool no_sync_defaults;
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struct reg_default *patch;
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int patch_regs;
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@ -249,6 +249,22 @@ int regcache_write(struct regmap *map,
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return 0;
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}
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static bool regcache_reg_needs_sync(struct regmap *map, unsigned int reg,
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unsigned int val)
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{
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int ret;
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/* If we don't know the chip just got reset, then sync everything. */
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if (!map->no_sync_defaults)
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return true;
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/* Is this the hardware default? If so skip. */
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ret = regcache_lookup_reg(map, reg);
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if (ret >= 0 && val == map->reg_defaults[ret].def)
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return false;
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return true;
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}
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static int regcache_default_sync(struct regmap *map, unsigned int min,
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unsigned int max)
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{
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@ -266,9 +282,7 @@ static int regcache_default_sync(struct regmap *map, unsigned int min,
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if (ret)
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return ret;
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/* Is this the hardware default? If so skip. */
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ret = regcache_lookup_reg(map, reg);
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if (ret >= 0 && val == map->reg_defaults[ret].def)
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if (!regcache_reg_needs_sync(map, reg, val))
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continue;
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map->cache_bypass = 1;
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@ -342,6 +356,7 @@ out:
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/* Restore the bypass state */
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map->async = false;
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map->cache_bypass = bypass;
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map->no_sync_defaults = false;
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map->unlock(map->lock_arg);
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regmap_async_complete(map);
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@ -397,6 +412,7 @@ out:
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/* Restore the bypass state */
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map->cache_bypass = bypass;
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map->async = false;
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map->no_sync_defaults = false;
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map->unlock(map->lock_arg);
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regmap_async_complete(map);
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@ -461,18 +477,23 @@ void regcache_cache_only(struct regmap *map, bool enable)
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EXPORT_SYMBOL_GPL(regcache_cache_only);
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/**
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* regcache_mark_dirty: Mark the register cache as dirty
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* regcache_mark_dirty: Indicate that HW registers were reset to default values
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*
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* @map: map to mark
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*
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* Mark the register cache as dirty, for example due to the device
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* having been powered down for suspend. If the cache is not marked
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* as dirty then the cache sync will be suppressed.
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* Inform regcache that the device has been powered down or reset, so that
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* on resume, regcache_sync() knows to write out all non-default values
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* stored in the cache.
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*
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* If this function is not called, regcache_sync() will assume that
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* the hardware state still matches the cache state, modulo any writes that
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* happened when cache_only was true.
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*/
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void regcache_mark_dirty(struct regmap *map)
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{
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map->lock(map->lock_arg);
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map->cache_dirty = true;
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map->no_sync_defaults = true;
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map->unlock(map->lock_arg);
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}
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EXPORT_SYMBOL_GPL(regcache_mark_dirty);
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@ -613,10 +634,7 @@ static int regcache_sync_block_single(struct regmap *map, void *block,
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continue;
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val = regcache_get_val(map, block, i);
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/* Is this the hardware default? If so skip. */
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ret = regcache_lookup_reg(map, regtmp);
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if (ret >= 0 && val == map->reg_defaults[ret].def)
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if (!regcache_reg_needs_sync(map, regtmp, val))
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continue;
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map->cache_bypass = 1;
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@ -688,10 +706,7 @@ static int regcache_sync_block_raw(struct regmap *map, void *block,
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}
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val = regcache_get_val(map, block, i);
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/* Is this the hardware default? If so skip. */
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ret = regcache_lookup_reg(map, regtmp);
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if (ret >= 0 && val == map->reg_defaults[ret].def) {
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if (!regcache_reg_needs_sync(map, regtmp, val)) {
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ret = regcache_sync_block_raw_flush(map, &data,
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base, regtmp);
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if (ret != 0)
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@ -109,7 +109,7 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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if (!d->chip->init_ack_masked)
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continue;
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/*
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* Ack all the masked interrupts uncondictionly,
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* Ack all the masked interrupts unconditionally,
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* OR if there is masked interrupt which hasn't been Acked,
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* it'll be ignored in irq handler, then may introduce irq storm
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*/
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@ -306,19 +306,12 @@ static int regmap_irq_map(struct irq_domain *h, unsigned int virq,
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irq_set_chip_data(virq, data);
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irq_set_chip(virq, &data->irq_chip);
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irq_set_nested_thread(virq, 1);
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/* ARM needs us to explicitly flag the IRQ as valid
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* and will set them noprobe when we do so. */
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#ifdef CONFIG_ARM
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set_irq_flags(virq, IRQF_VALID);
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#else
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irq_set_noprobe(virq);
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#endif
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return 0;
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}
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static struct irq_domain_ops regmap_domain_ops = {
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static const struct irq_domain_ops regmap_domain_ops = {
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.map = regmap_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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@ -2609,6 +2609,30 @@ int regmap_get_val_bytes(struct regmap *map)
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}
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EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
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/**
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* regmap_get_max_register(): Report the max register value
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*
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* Report the max register value, mainly intended to for use by
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* generic infrastructure built on top of regmap.
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*/
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int regmap_get_max_register(struct regmap *map)
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{
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return map->max_register ? map->max_register : -EINVAL;
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}
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EXPORT_SYMBOL_GPL(regmap_get_max_register);
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/**
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* regmap_get_reg_stride(): Report the register address stride
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*
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* Report the register address stride, mainly intended to for use by
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* generic infrastructure built on top of regmap.
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*/
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int regmap_get_reg_stride(struct regmap *map)
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{
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return map->reg_stride;
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}
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EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
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int regmap_parse_val(struct regmap *map, const void *buf,
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unsigned int *val)
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{
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@ -433,6 +433,8 @@ int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
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unsigned int mask, unsigned int val,
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bool *change);
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int regmap_get_val_bytes(struct regmap *map);
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int regmap_get_max_register(struct regmap *map);
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int regmap_get_reg_stride(struct regmap *map);
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int regmap_async_complete(struct regmap *map);
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bool regmap_can_raw_write(struct regmap *map);
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@ -676,6 +678,18 @@ static inline int regmap_get_val_bytes(struct regmap *map)
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return -EINVAL;
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}
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static inline int regmap_get_max_register(struct regmap *map)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_get_reg_stride(struct regmap *map)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regcache_sync(struct regmap *map)
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{
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WARN_ONCE(1, "regmap API is disabled");
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