ARC: Support for single cycle Close Coupled Mem (CCM)
* Includes mapping of CCMs in address space * Annotations to move arbitrary code/data into CCM * Moving some of the critical code/data into CCM * Runtime detection/reporting Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -198,6 +198,33 @@ config ARC_CACHE_PAGES
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endif #ARC_CACHE
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config ARC_HAS_ICCM
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bool "Use ICCM"
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help
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Single Cycle RAMS to store Fast Path Code
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default n
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config ARC_ICCM_SZ
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int "ICCM Size in KB"
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default "64"
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depends on ARC_HAS_ICCM
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config ARC_HAS_DCCM
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bool "Use DCCM"
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help
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Single Cycle RAMS to store Fast Path Data
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default n
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config ARC_DCCM_SZ
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int "DCCM Size in KB"
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default "64"
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depends on ARC_HAS_DCCM
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config ARC_DCCM_BASE
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hex "DCCM map address"
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default "0xA0000000"
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depends on ARC_HAS_DCCM
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config ARC_HAS_HW_MPY
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bool "Use Hardware Multiplier (Normal or Faster XMAC)"
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default y
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@ -25,6 +25,39 @@
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.size \ name, ASM_PREV_SYM_ADDR(\name)
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.endm
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/* annotation for data we want in DCCM - if enabled in .config */
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.macro ARCFP_DATA nm
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#ifdef CONFIG_ARC_HAS_DCCM
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.section .data.arcfp
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#else
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.section .data
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#endif
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.global \nm
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.endm
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/* annotation for data we want in DCCM - if enabled in .config */
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.macro ARCFP_CODE
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#ifdef CONFIG_ARC_HAS_ICCM
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.section .text.arcfp, "ax",@progbits
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#else
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.section .text, "ax",@progbits
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#endif
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.endm
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#else /* !__ASSEMBLY__ */
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#ifdef CONFIG_ARC_HAS_ICCM
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#define __arcfp_code __attribute__((__section__(".text.arcfp")))
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#else
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#define __arcfp_code __attribute__((__section__(".text")))
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#endif
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#ifdef CONFIG_ARC_HAS_DCCM
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#define __arcfp_data __attribute__((__section__(".data.arcfp")))
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#else
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#define __arcfp_data __attribute__((__section__(".data")))
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#endif
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#endif /* __ASSEMBLY__ */
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#endif
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@ -149,7 +149,7 @@ VECTOR reserved ; Reserved Exceptions
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;##################### Scratch Mem for IRQ stack switching #############
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.section .data ; NOT .global
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ARCFP_DATA int1_saved_reg
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.align 32
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.type int1_saved_reg, @object
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.size int1_saved_reg, 4
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@ -159,7 +159,7 @@ int1_saved_reg:
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/* Each Interrupt level needs it's own scratch */
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#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
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.section .data ; NOT .global
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ARCFP_DATA int2_saved_reg
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.type int2_saved_reg, @object
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.size int2_saved_reg, 4
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int2_saved_reg:
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@ -64,6 +64,33 @@ void __init read_arc_build_cfg_regs(void)
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cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
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cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
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/* Note that we read the CCM BCRs independent of kernel config
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* This is to catch the cases where user doesn't know that
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* CCMs are present in hardware build
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*/
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{
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struct bcr_iccm iccm;
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struct bcr_dccm dccm;
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struct bcr_dccm_base dccm_base;
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unsigned int bcr_32bit_val;
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bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
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if (bcr_32bit_val) {
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iccm = *((struct bcr_iccm *)&bcr_32bit_val);
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cpu->iccm.base_addr = iccm.base << 16;
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cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
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}
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bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
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if (bcr_32bit_val) {
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dccm = *((struct bcr_dccm *)&bcr_32bit_val);
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cpu->dccm.sz = 0x800 << (dccm.sz);
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READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
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cpu->dccm.base_addr = dccm_base.addr << 8;
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}
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}
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READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
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read_decode_mmu_bcr();
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@ -211,6 +238,30 @@ char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
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return buf;
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}
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void __init arc_chk_ccms(void)
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{
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#if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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#ifdef CONFIG_ARC_HAS_DCCM
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/*
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* DCCM can be arbit placed in hardware.
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* Make sure it's placement/sz matches what Linux is built with
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*/
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if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
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panic("Linux built with incorrect DCCM Base address\n");
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if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
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panic("Linux built with incorrect DCCM Size\n");
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#endif
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#ifdef CONFIG_ARC_HAS_ICCM
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if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
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panic("Linux built with incorrect ICCM Size\n");
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#endif
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#endif
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}
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/*
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* Ensure that FP hardware and kernel config match
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* -If hardware contains DPFP, kernel needs to save/restore FPU state
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@ -255,7 +306,7 @@ void __init setup_processor(void)
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arc_mmu_init();
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arc_cache_init();
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arc_chk_ccms();
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printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
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@ -23,6 +23,12 @@ jiffies = jiffies_64;
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SECTIONS
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{
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/*
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* ICCM starts at 0x8000_0000. So if kernel is relocated to some other
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* address, make sure peripheral at 0x8z doesn't clash with ICCM
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* Essentially vector is also in ICCM.
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*/
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. = CONFIG_LINUX_LINK_BASE;
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_int_vec_base_lds = .;
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@ -31,6 +37,13 @@ SECTIONS
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. = ALIGN(PAGE_SIZE);
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}
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#ifdef CONFIG_ARC_HAS_ICCM
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.text.arcfp : {
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*(.text.arcfp)
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. = ALIGN(CONFIG_ARC_ICCM_SZ * 1024);
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}
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#endif
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/*
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* The reason for having a seperate subsection .init.ramfs is to
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* prevent objump from including it in kernel dumps
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@ -134,4 +147,12 @@ SECTIONS
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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#ifdef CONFIG_ARC_HAS_DCCM
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. = CONFIG_ARC_DCCM_BASE;
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__arc_dccm_base = .;
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.data.arcfp : {
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*(.data.arcfp)
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}
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. = ALIGN(CONFIG_ARC_DCCM_SZ * 1024);
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#endif
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}
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@ -53,8 +53,7 @@
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; For details refer to comments before TLBMISS_FREEUP_REGS below
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;--------------------------------------------------------------------------
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.section .data
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.global ex_saved_reg1
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ARCFP_DATA ex_saved_reg1
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.align 1 << L1_CACHE_SHIFT ; IMP: Must be Cache Line aligned
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.type ex_saved_reg1, @object
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#ifdef CONFIG_SMP
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@ -255,7 +254,7 @@ ex_saved_reg1:
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#endif
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.endm
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.section .text, "ax",@progbits ;Fast Path Code, candidate for ICCM
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ARCFP_CODE ;Fast Path Code, candidate for ICCM
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;-----------------------------------------------------------------------------
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; I-TLB Miss Exception Handler
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