[POWERPC] pasemi: Don't enter powersaving states from elevated astates
When the PWRficient cpus are entered into powersavings states, the astate is automatically dropped down to 0. While we still restore it when we come out of idle, it can still cause some weird effects with respect to performance (especially since it takes a while to ramp up to higher astates). So, to avoid this, don't enter power savings when the cpufreq driver (or user) has set higher astates than 0. The restore is still required, since there's a chance the astate has been raised from the other cpu while the idling one was asleep. Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -32,6 +32,7 @@
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/time.h>
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#include <asm/smp.h>
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#define SDCASR_REG 0x0100
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#define SDCASR_REG_STRIDE 0x1000
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@ -124,6 +125,11 @@ static void set_astate(int cpu, unsigned int astate)
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local_irq_restore(flags);
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}
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int check_astate(void)
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{
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return get_cur_astate(hard_smp_processor_id());
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}
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void restore_astate(int cpu)
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{
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set_astate(cpu, current_astate);
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@ -16,8 +16,14 @@ extern void idle_doze(void);
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/* Restore astate to last set */
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#ifdef CONFIG_PPC_PASEMI_CPUFREQ
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extern int check_astate(void);
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extern void restore_astate(int cpu);
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#else
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static inline int check_astate(void)
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{
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/* Always return >0 so we never power save */
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return 1;
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}
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static inline void restore_astate(int cpu)
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{
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}
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@ -62,7 +62,16 @@ sleep_common:
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mflr r0
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std r0, 16(r1)
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stdu r1,-64(r1)
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#ifdef CONFIG_PPC_PASEMI_CPUFREQ
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std r3, 48(r1)
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/* Only do power savings when in astate 0 */
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bl .check_astate
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cmpwi r3,0
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bne 1f
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ld r3, 48(r1)
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#endif
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LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE)
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mfmsr r4
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andc r5,r4,r6
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@ -73,7 +82,7 @@ sleep_common:
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mtmsrd r4,0
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addi r1,r1,64
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1: addi r1,r1,64
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ld r0,16(r1)
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mtlr r0
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blr
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