Samsung DTS ARM64 changes for v4.21, part 2
Add IMEM clock controller (for Security SubSystem) and Bluetooth chip to Exynos5433 TM2(e) boards. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAlwZUDoQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1w6DD/0Uew7/eRS16gt6EChKidNjbMsAeMoe790n +CxlMEcopK4Eab1q0gftu1D++nTNHD0k6jxYLNQgKqg+zovDg/csYZiLX4F6W1Re jSWNXUQvoTXKc85MvCJW2tpo5if9rEJLm+OBDSL4ih524SMzPvySp9eRFNKP7jy3 PPgdkwkXiCtRhzIIGa/fWxYhbkJ//k6poKFRPgVwQbcqKhbRLsHZCXRe7NRzTejU o8hGonjoekrou9JRR0jC82qNOan3vrAH//aAZJNlYdpjRC+tW/iGMLXK9wfPMQGO I1SaMETdfEES+uORqaVhcz778rCoBtj9jk9S2QnKLUhpLV6d+RcLHUMkXBQ3A9ZX EgtuzGcedcQHQiHvn0OBwOJYfY2cmQ+cQMWgL2jiETqlJD7bpAl8Zsv5rjZ/+vdI WGPC/4NSukbS8Va8gqqkLs6UElSJlV18NUayBqSPDvH2UMMSwn/ILV39fSxVpG/0 y1Tu2cpsMMwapHv3zC6RigvWZkOMx5DwD0TJg43iyCvvVhmo+9JV/GWhe7wM0ymX 29GL2F6PmIzpzAa3HdNeS7iAqYWmMvZ5e2c+6gvc0LGoP+QO2a2eRH8sy+iVF5JU uk8BZbXFfVeKU+K71Z83fm0zpQZY2GD9GJZYwEKVfQ0wGoXtjeJ5iQhWPohCC15V coWHMUKp2A== =JVh0 -----END PGP SIGNATURE----- Merge tag 'samsung-dt64-4.21-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late Samsung DTS ARM64 changes for v4.21, part 2 Add IMEM clock controller (for Security SubSystem) and Bluetooth chip to Exynos5433 TM2(e) boards. * tag 'samsung-dt64-4.21-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: Add Bluetooth chip to TM2(e) boards arm64: dts: exynos: Add IMEM clock controller to Exynos5433 arm64: dts: exynos: Add all CPUs in cooling maps arm64: dts: exynos: Update DWC3 modules on Exynos5433 SoCs Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
8a66c20e66
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@ -1202,6 +1202,20 @@
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status = "okay";
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};
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&serial_3 {
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status = "okay";
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bluetooth {
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compatible = "brcm,bcm43438-bt";
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max-speed = <3000000>;
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shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
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device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
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clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
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clock-names = "extclk";
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};
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};
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&spi_1 {
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cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
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status = "okay";
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@ -55,37 +55,44 @@ thermal-zones {
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map0 {
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/* Set maximum frequency as 1800MHz */
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trip = <&atlas0_alert_0>;
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cooling-device = <&cpu4 1 2>;
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cooling-device = <&cpu4 1 2>, <&cpu5 1 2>,
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<&cpu6 1 2>, <&cpu7 1 2>;
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};
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map1 {
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/* Set maximum frequency as 1700MHz */
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trip = <&atlas0_alert_1>;
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cooling-device = <&cpu4 2 3>;
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cooling-device = <&cpu4 2 3>, <&cpu5 2 3>,
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<&cpu6 2 3>, <&cpu7 2 3>;
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};
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map2 {
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/* Set maximum frequency as 1600MHz */
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trip = <&atlas0_alert_2>;
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cooling-device = <&cpu4 3 4>;
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cooling-device = <&cpu4 3 4>, <&cpu5 3 4>,
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<&cpu6 3 4>, <&cpu7 3 4>;
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};
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map3 {
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/* Set maximum frequency as 1500MHz */
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trip = <&atlas0_alert_3>;
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cooling-device = <&cpu4 4 5>;
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cooling-device = <&cpu4 4 5>, <&cpu5 4 5>,
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<&cpu6 4 5>, <&cpu7 4 5>;
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};
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map4 {
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/* Set maximum frequency as 1400MHz */
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trip = <&atlas0_alert_4>;
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cooling-device = <&cpu4 5 7>;
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cooling-device = <&cpu4 5 7>, <&cpu5 5 7>,
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<&cpu6 5 7>, <&cpu7 5 7>;
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};
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map5 {
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/* Set maximum frequencyas 1200MHz */
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trip = <&atlas0_alert_5>;
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cooling-device = <&cpu4 7 9>;
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cooling-device = <&cpu4 7 9>, <&cpu5 7 9>,
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<&cpu6 7 9>, <&cpu7 7 9>;
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};
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map6 {
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/* Set maximum frequency as 1000MHz */
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trip = <&atlas0_alert_6>;
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cooling-device = <&cpu4 9 14>;
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cooling-device = <&cpu4 9 14>, <&cpu5 9 14>,
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<&cpu6 9 14>, <&cpu7 9 14>;
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};
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};
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};
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@ -222,27 +229,32 @@ thermal-zones {
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map0 {
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/* Set maximum frequency as 1200MHz */
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trip = <&apollo_alert_2>;
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cooling-device = <&cpu0 1 2>;
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cooling-device = <&cpu0 1 2>, <&cpu1 1 2>,
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<&cpu2 1 2>, <&cpu3 1 2>;
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};
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map1 {
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/* Set maximum frequency as 1100MHz */
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trip = <&apollo_alert_3>;
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cooling-device = <&cpu0 2 3>;
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cooling-device = <&cpu0 2 3>, <&cpu1 2 3>,
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<&cpu2 2 3>, <&cpu3 2 3>;
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};
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map2 {
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/* Set maximum frequency as 1000MHz */
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trip = <&apollo_alert_4>;
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cooling-device = <&cpu0 3 4>;
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cooling-device = <&cpu0 3 4>, <&cpu1 3 4>,
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<&cpu2 3 4>, <&cpu3 3 4>;
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};
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map3 {
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/* Set maximum frequency as 900MHz */
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trip = <&apollo_alert_5>;
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cooling-device = <&cpu0 4 5>;
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cooling-device = <&cpu0 4 5>, <&cpu1 4 5>,
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<&cpu2 4 5>, <&cpu3 4 5>;
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};
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map4 {
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/* Set maximum frequency as 800MHz */
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trip = <&apollo_alert_6>;
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cooling-device = <&cpu0 5 9>;
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cooling-device = <&cpu0 5 9>, <&cpu1 5 9>,
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<&cpu2 5 9>, <&cpu3 5 9>;
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};
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};
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};
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@ -544,6 +544,21 @@
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power-domains = <&pd_cam1>;
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};
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cmu_imem: clock-controller@11060000 {
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compatible = "samsung,exynos5433-cmu-imem";
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reg = <0x11060000 0x1000>;
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#clock-cells = <1>;
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clock-names = "oscclk",
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"aclk_imem_sssx_266",
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"aclk_imem_266",
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"aclk_imem_200";
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clocks = <&xxti>,
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<&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>,
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<&cmu_top CLK_DIV_ACLK_IMEM_266>,
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<&cmu_top CLK_DIV_ACLK_IMEM_200>;
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};
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pd_gscl: power-domain@105c4000 {
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compatible = "samsung,exynos5433-pd";
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reg = <0x105c4000 0x20>;
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@ -1559,10 +1574,12 @@
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};
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usbdrd30: usbdrd {
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compatible = "samsung,exynos5250-dwusb3";
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compatible = "samsung,exynos5433-dwusb3";
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clocks = <&cmu_fsys CLK_ACLK_USBDRD30>,
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<&cmu_fsys CLK_SCLK_USBDRD30>;
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clock-names = "usbdrd30", "usbdrd30_susp_clk";
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<&cmu_fsys CLK_SCLK_USBDRD30>,
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<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>,
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<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>;
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clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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@ -1570,6 +1587,10 @@
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usbdrd_dwc3: dwc3@15400000 {
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compatible = "snps,dwc3";
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clocks = <&cmu_fsys CLK_SCLK_USBDRD30>,
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<&cmu_fsys CLK_ACLK_USBDRD30>,
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<&cmu_fsys CLK_SCLK_USBDRD30>;
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clock-names = "ref", "bus_early", "suspend";
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reg = <0x15400000 0x10000>;
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interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usbdrd30_phy 0>, <&usbdrd30_phy 1>;
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@ -1606,10 +1627,12 @@
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};
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usbhost30: usbhost {
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compatible = "samsung,exynos5250-dwusb3";
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compatible = "samsung,exynos5433-dwusb3";
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clocks = <&cmu_fsys CLK_ACLK_USBHOST30>,
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<&cmu_fsys CLK_SCLK_USBHOST30>;
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clock-names = "usbdrd30", "usbdrd30_susp_clk";
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<&cmu_fsys CLK_SCLK_USBHOST30>,
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<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK>,
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<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK>;
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clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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@ -1617,6 +1640,10 @@
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usbhost_dwc3: dwc3@15a00000 {
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compatible = "snps,dwc3";
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clocks = <&cmu_fsys CLK_SCLK_USBHOST30>,
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<&cmu_fsys CLK_ACLK_USBHOST30>,
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<&cmu_fsys CLK_SCLK_USBHOST30>;
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clock-names = "ref", "bus_early", "suspend";
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reg = <0x15a00000 0x10000>;
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interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usbhost30_phy 0>, <&usbhost30_phy 1>;
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