Merge branch 'amd-xgbe-net'
Tom Lendacky says: ==================== amd-xgbe: AMD XGBE driver fixes 2014-08-29 The following series of patches includes fixes to the driver. - Tx hardware queue flushing support dependent on hardware version - Incorrect reported fifo size - Proper mmd select in XPCS debugfs support - Proper queue count for configuring Tx flow control This patch series is based on net. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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8a3cf39b72
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@ -272,8 +272,8 @@ static ssize_t xpcs_reg_value_read(struct file *filp, char __user *buffer,
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struct xgbe_prv_data *pdata = filp->private_data;
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unsigned int value;
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value = pdata->hw_if.read_mmd_regs(pdata, pdata->debugfs_xpcs_mmd,
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pdata->debugfs_xpcs_reg);
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value = XMDIO_READ(pdata, pdata->debugfs_xpcs_mmd,
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pdata->debugfs_xpcs_reg);
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return xgbe_common_read(buffer, count, ppos, value);
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}
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@ -290,8 +290,8 @@ static ssize_t xpcs_reg_value_write(struct file *filp,
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if (len < 0)
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return len;
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pdata->hw_if.write_mmd_regs(pdata, pdata->debugfs_xpcs_mmd,
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pdata->debugfs_xpcs_reg, value);
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XMDIO_WRITE(pdata, pdata->debugfs_xpcs_mmd, pdata->debugfs_xpcs_reg,
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value);
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return len;
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}
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@ -348,7 +348,7 @@ static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata)
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/* Clear MAC flow control */
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max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES;
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q_count = min_t(unsigned int, pdata->rx_q_count, max_q_count);
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q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count);
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reg = MAC_Q0TFCR;
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for (i = 0; i < q_count; i++) {
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reg_val = XGMAC_IOREAD(pdata, reg);
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@ -373,7 +373,7 @@ static int xgbe_enable_tx_flow_control(struct xgbe_prv_data *pdata)
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/* Set MAC flow control */
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max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES;
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q_count = min_t(unsigned int, pdata->rx_q_count, max_q_count);
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q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count);
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reg = MAC_Q0TFCR;
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for (i = 0; i < q_count; i++) {
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reg_val = XGMAC_IOREAD(pdata, reg);
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@ -1633,6 +1633,9 @@ static int xgbe_flush_tx_queues(struct xgbe_prv_data *pdata)
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{
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unsigned int i, count;
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if (XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER) < 0x21)
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return 0;
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for (i = 0; i < pdata->tx_q_count; i++)
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XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, FTQ, 1);
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@ -1703,8 +1706,8 @@ static void xgbe_config_mtl_mode(struct xgbe_prv_data *pdata)
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XGMAC_IOWRITE_BITS(pdata, MTL_OMR, RAA, MTL_RAA_SP);
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}
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static unsigned int xgbe_calculate_per_queue_fifo(unsigned long fifo_size,
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unsigned char queue_count)
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static unsigned int xgbe_calculate_per_queue_fifo(unsigned int fifo_size,
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unsigned int queue_count)
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{
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unsigned int q_fifo_size = 0;
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enum xgbe_mtl_fifo_size p_fifo = XGMAC_MTL_FIFO_SIZE_256;
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@ -1748,6 +1751,10 @@ static unsigned int xgbe_calculate_per_queue_fifo(unsigned long fifo_size,
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q_fifo_size = XGBE_FIFO_SIZE_KB(256);
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break;
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}
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/* The configured value is not the actual amount of fifo RAM */
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q_fifo_size = min_t(unsigned int, XGBE_FIFO_MAX, q_fifo_size);
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q_fifo_size = q_fifo_size / queue_count;
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/* Set the queue fifo size programmable value */
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@ -361,6 +361,8 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)
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memset(hw_feat, 0, sizeof(*hw_feat));
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hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR);
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/* Hardware feature register 0 */
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hw_feat->gmii = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL);
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hw_feat->vlhash = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH);
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@ -361,15 +361,16 @@ static void xgbe_get_drvinfo(struct net_device *netdev,
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struct ethtool_drvinfo *drvinfo)
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{
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struct xgbe_prv_data *pdata = netdev_priv(netdev);
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struct xgbe_hw_features *hw_feat = &pdata->hw_feat;
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strlcpy(drvinfo->driver, XGBE_DRV_NAME, sizeof(drvinfo->driver));
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strlcpy(drvinfo->version, XGBE_DRV_VERSION, sizeof(drvinfo->version));
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strlcpy(drvinfo->bus_info, dev_name(pdata->dev),
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sizeof(drvinfo->bus_info));
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snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "%d.%d.%d",
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XGMAC_IOREAD_BITS(pdata, MAC_VR, USERVER),
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XGMAC_IOREAD_BITS(pdata, MAC_VR, DEVID),
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XGMAC_IOREAD_BITS(pdata, MAC_VR, SNPSVER));
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XGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER),
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XGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID),
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XGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER));
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drvinfo->n_stats = XGBE_STATS_COUNT;
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}
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@ -183,6 +183,7 @@
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#define XGMAC_DRIVER_CONTEXT 1
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#define XGMAC_IOCTL_CONTEXT 2
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#define XGBE_FIFO_MAX 81920
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#define XGBE_FIFO_SIZE_B(x) (x)
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#define XGBE_FIFO_SIZE_KB(x) (x * 1024)
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@ -526,6 +527,9 @@ struct xgbe_desc_if {
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* or configurations are present in the device.
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*/
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struct xgbe_hw_features {
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/* HW Version */
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unsigned int version;
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/* HW Feature Register0 */
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unsigned int gmii; /* 1000 Mbps support */
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unsigned int vlhash; /* VLAN Hash Filter */
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