Allwinner arm64 changes for 4.18
We mostly have some changes to support the H6, Allwinner latest SoC. We're still in the preliminary phase, with I2C, pinctrl and clock support. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAlsCsQwACgkQ0rTAlCFN r3S9EhAAifnKDgAqWGuLR9xau3nK8CbjSLyFAba9ARdIuwxO3D0p6xgNkogve3o9 huwtx60TPfZeg86e5dqKmuC7gO/AKK0TaFDQcTXR4dEF6eH635J9yh1G5L6LjrLA X9+EjuIL7a6HgolwyssRLLQETq3w5Pc+xMcoIc0J4ey0a4H8GjvXQWMzB+ytJWA1 Ykih6hMqJiR1VWbqSefx24+4X7RaBSwqu2S/GDk9Fi6Fabg5rbzH2tgolr0fK2BA QtGx9LvJFsjpUwa2rOBom1EvEOoFri2ef3D06vOq8Nc0UA9G41JkWBXYczxRP1m5 0SEZUybyudIJMn+X3arEOklEEN5dsfzLnbpT7xWgjocPyt1foPtBYg/usPb8bvwn k58j/nQDDrVPADEonbWmSBJ+5mtGl7pamJtm6GE0kCAe9eG8kLt0mkL5EH4X2Sq2 0P5q6HAjA866IACZzu4CRipXlBNCY+oMXSeaOkOYIfyIshNKkWPyxqim98FDtm6Y 66nfON3yXWOmbWwIW2z7HSJXpIn4L+qMD0OvTZWDISANQWybaKxeytVMcB65iEGQ LzhfZi8K1tZdTN0cvsdKXrTTMnkcU4a1OZbDLe6vBPAengX219MYu1uCd+ArQ1Md Rd1rjT+Nv2JpVTFV1AUgeoA1Yhu1Nw1zQTAu5y3d64HJCnybamU= =d7Ql -----END PGP SIGNATURE----- Merge tag 'sunxi-dt64-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt Allwinner arm64 changes for 4.18 We mostly have some changes to support the H6, Allwinner latest SoC. We're still in the preliminary phase, with I2C, pinctrl and clock support. * tag 'sunxi-dt64-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: allwinner: h6: add PCF8563 RTC on Pine H64 board arm64: allwinner: h6: add R_I2C controller arm64: allwinner: h6: add R_INTC interrupt controller arm64: allwinner: h6: add node for R_PIO pin controller arm64: allwinner: h6: add PRCM CCU device node arm64: dts: allwinner: a64: bananapi-m64: add usb otg arm64: dts: allwinner: axp803: Add drivevbus regulator arm64: allwinner: h6: restore the usage of CCU slice macros Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
89bab02a4a
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@ -146,5 +146,10 @@
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regulator-max-microvolt = <3000000>;
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regulator-name = "rtc-ldo";
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};
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reg_drivevbus: drivevbus {
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regulator-name = "drivevbus";
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status = "disabled";
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};
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};
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};
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@ -86,6 +86,10 @@
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};
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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@ -155,6 +159,10 @@
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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@ -167,6 +175,7 @@
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reg = <0x3a3>;
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interrupt-parent = <&r_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
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};
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};
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@ -254,6 +263,11 @@
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regulator-name = "vcc-wifi-io";
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};
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®_drivevbus {
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regulator-name = "usb0-vbus";
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status = "okay";
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};
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®_eldo1 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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@ -294,6 +308,13 @@
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status = "okay";
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};
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&usbphy {
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&usb_otg {
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dr_mode = "otg";
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status = "okay";
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};
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&usbphy {
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usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
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usb0_vbus-supply = <®_drivevbus>;
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status = "okay";
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};
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@ -22,6 +22,16 @@
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};
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};
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&r_i2c {
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status = "okay";
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pcf8563: rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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#clock-cells = <0>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_ph_pins>;
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@ -4,6 +4,8 @@
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/sun50i-h6-ccu.h>
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#include <dt-bindings/reset/sun50i-h6-ccu.h>
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/ {
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interrupt-parent = <&gic>;
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@ -115,7 +117,7 @@
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<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu 26>, <&osc24M>, <&osc32k>;
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clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>;
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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#gpio-cells = <3>;
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@ -134,8 +136,8 @@
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&ccu 70>;
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resets = <&ccu 21>;
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clocks = <&ccu CLK_BUS_UART0>;
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resets = <&ccu RST_BUS_UART0>;
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status = "disabled";
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};
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@ -145,8 +147,8 @@
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&ccu 71>;
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resets = <&ccu 22>;
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clocks = <&ccu CLK_BUS_UART1>;
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resets = <&ccu RST_BUS_UART1>;
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status = "disabled";
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};
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@ -156,8 +158,8 @@
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&ccu 72>;
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resets = <&ccu 23>;
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clocks = <&ccu CLK_BUS_UART2>;
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resets = <&ccu RST_BUS_UART2>;
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status = "disabled";
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};
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@ -167,9 +169,59 @@
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&ccu 73>;
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resets = <&ccu 24>;
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clocks = <&ccu CLK_BUS_UART3>;
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resets = <&ccu RST_BUS_UART3>;
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status = "disabled";
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};
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r_ccu: clock@7010000 {
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compatible = "allwinner,sun50i-h6-r-ccu";
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reg = <0x07010000 0x400>;
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clocks = <&osc24M>, <&osc32k>, <&iosc>,
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<&ccu CLK_PLL_PERIPH0>;
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clock-names = "hosc", "losc", "iosc", "pll-periph";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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r_intc: interrupt-controller@7021000 {
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compatible = "allwinner,sun50i-h6-r-intc",
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"allwinner,sun6i-a31-r-intc";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x07021000 0x400>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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};
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r_pio: pinctrl@7022000 {
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compatible = "allwinner,sun50i-h6-r-pinctrl";
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reg = <0x07022000 0x400>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>;
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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#gpio-cells = <3>;
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interrupt-controller;
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#interrupt-cells = <3>;
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r_i2c_pins: r-i2c {
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pins = "PL0", "PL1";
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function = "s_i2c";
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};
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};
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r_i2c: i2c@7081400 {
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compatible = "allwinner,sun6i-a31-i2c";
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reg = <0x07081400 0x400>;
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interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&r_ccu 8>;
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resets = <&r_ccu 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&r_i2c_pins>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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