Merge branch 'for-3.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata fixes from Tejun Heo: "This contains three commits all of which are updates for specific devices which aren't too widespread. Pretty limited scope and nothing too interesting or dangerous" * 'for-3.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: sata_fsl: save irqs while coalescing libata: apply behavioral quirks to sil3826 PMP sata, highbank: fix ordering of SGPIO signals
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commit
89b53e50bd
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@ -289,24 +289,24 @@ static int sata_pmp_configure(struct ata_device *dev, int print_info)
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/* Disable sending Early R_OK.
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* With "cached read" HDD testing and multiple ports busy on a SATA
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* host controller, 3726 PMP will very rarely drop a deferred
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* host controller, 3x26 PMP will very rarely drop a deferred
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* R_OK that was intended for the host. Symptom will be all
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* 5 drives under test will timeout, get reset, and recover.
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*/
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if (vendor == 0x1095 && devid == 0x3726) {
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if (vendor == 0x1095 && (devid == 0x3726 || devid == 0x3826)) {
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u32 reg;
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err_mask = sata_pmp_read(&ap->link, PMP_GSCR_SII_POL, ®);
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if (err_mask) {
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rc = -EIO;
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reason = "failed to read Sil3726 Private Register";
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reason = "failed to read Sil3x26 Private Register";
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goto fail;
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}
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reg &= ~0x1;
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err_mask = sata_pmp_write(&ap->link, PMP_GSCR_SII_POL, reg);
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if (err_mask) {
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rc = -EIO;
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reason = "failed to write Sil3726 Private Register";
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reason = "failed to write Sil3x26 Private Register";
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goto fail;
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}
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}
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@ -383,8 +383,8 @@ static void sata_pmp_quirks(struct ata_port *ap)
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u16 devid = sata_pmp_gscr_devid(gscr);
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struct ata_link *link;
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if (vendor == 0x1095 && devid == 0x3726) {
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/* sil3726 quirks */
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if (vendor == 0x1095 && (devid == 0x3726 || devid == 0x3826)) {
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/* sil3x26 quirks */
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ata_for_each_link(link, ap, EDGE) {
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/* link reports offline after LPM */
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link->flags |= ATA_LFLAG_NO_LPM;
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@ -293,6 +293,7 @@ static void fsl_sata_set_irq_coalescing(struct ata_host *host,
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{
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struct sata_fsl_host_priv *host_priv = host->private_data;
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void __iomem *hcr_base = host_priv->hcr_base;
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unsigned long flags;
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if (count > ICC_MAX_INT_COUNT_THRESHOLD)
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count = ICC_MAX_INT_COUNT_THRESHOLD;
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@ -305,12 +306,12 @@ static void fsl_sata_set_irq_coalescing(struct ata_host *host,
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(count > ICC_MIN_INT_COUNT_THRESHOLD))
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ticks = ICC_SAFE_INT_TICKS;
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spin_lock(&host->lock);
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spin_lock_irqsave(&host->lock, flags);
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iowrite32((count << 24 | ticks), hcr_base + ICC);
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intr_coalescing_count = count;
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intr_coalescing_ticks = ticks;
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spin_unlock(&host->lock);
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spin_unlock_irqrestore(&host->lock, flags);
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DPRINTK("interrupt coalescing, count = 0x%x, ticks = %x\n",
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intr_coalescing_count, intr_coalescing_ticks);
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@ -86,11 +86,11 @@ struct ecx_plat_data {
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#define SGPIO_SIGNALS 3
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#define ECX_ACTIVITY_BITS 0x300000
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#define ECX_ACTIVITY_SHIFT 2
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#define ECX_ACTIVITY_SHIFT 0
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#define ECX_LOCATE_BITS 0x80000
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#define ECX_LOCATE_SHIFT 1
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#define ECX_FAULT_BITS 0x400000
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#define ECX_FAULT_SHIFT 0
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#define ECX_FAULT_SHIFT 2
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static inline int sgpio_bit_shift(struct ecx_plat_data *pdata, u32 port,
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u32 shift)
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{
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