Merge branch 'iommu/next' of git://linuxtv.org/pinchartl/fbdev into arm/renesas
This commit is contained in:
commit
89aa57d15f
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@ -0,0 +1,41 @@
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* Renesas VMSA-Compatible IOMMU
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The IPMMU is an IOMMU implementation compatible with the ARM VMSA page tables.
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It provides address translation for bus masters outside of the CPU, each
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connected to the IPMMU through a port called micro-TLB.
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Required Properties:
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- compatible: Must contain "renesas,ipmmu-vmsa".
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- reg: Base address and size of the IPMMU registers.
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- interrupts: Specifiers for the MMU fault interrupts. For instances that
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support secure mode two interrupts must be specified, for non-secure and
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secure mode, in that order. For instances that don't support secure mode a
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single interrupt must be specified.
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- #iommu-cells: Must be 1.
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Each bus master connected to an IPMMU must reference the IPMMU in its device
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node with the following property:
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- iommus: A reference to the IPMMU in two cells. The first cell is a phandle
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to the IPMMU and the second cell the number of the micro-TLB that the
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device is connected to.
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Example: R8A7791 IPMMU-MX and VSP1-D0 bus master
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ipmmu_mx: mmu@fe951000 {
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compatible = "renasas,ipmmu-vmsa";
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reg = <0 0xfe951000 0 0x1000>;
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interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
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<0 221 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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};
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vsp1@fe928000 {
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...
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iommus = <&ipmmu_mx 13>;
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...
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};
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@ -16,7 +16,7 @@
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#include <linux/io.h>
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#include <linux/iommu.h>
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#include <linux/module.h>
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#include <linux/platform_data/ipmmu-vmsa.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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@ -29,7 +29,6 @@ struct ipmmu_vmsa_device {
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void __iomem *base;
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struct list_head list;
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const struct ipmmu_vmsa_platform_data *pdata;
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unsigned int num_utlbs;
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struct dma_iommu_mapping *mapping;
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@ -46,7 +45,8 @@ struct ipmmu_vmsa_domain {
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struct ipmmu_vmsa_archdata {
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struct ipmmu_vmsa_device *mmu;
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unsigned int utlb;
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unsigned int *utlbs;
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unsigned int num_utlbs;
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};
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static DEFINE_SPINLOCK(ipmmu_devices_lock);
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@ -58,6 +58,8 @@ static LIST_HEAD(ipmmu_devices);
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* Registers Definition
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*/
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#define IM_NS_ALIAS_OFFSET 0x800
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#define IM_CTX_SIZE 0x40
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#define IMCTR 0x0000
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@ -678,30 +680,33 @@ done:
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static void ipmmu_clear_pud(struct ipmmu_vmsa_device *mmu, pud_t *pud)
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{
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/* Free the page table. */
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pgtable_t table = pud_pgtable(*pud);
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__free_page(table);
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/* Clear the PUD. */
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*pud = __pud(0);
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ipmmu_flush_pgtable(mmu, pud, sizeof(*pud));
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/* Free the page table. */
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__free_page(table);
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}
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static void ipmmu_clear_pmd(struct ipmmu_vmsa_device *mmu, pud_t *pud,
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pmd_t *pmd)
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{
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pmd_t pmdval = *pmd;
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unsigned int i;
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/* Free the page table. */
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if (pmd_table(*pmd)) {
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pgtable_t table = pmd_pgtable(*pmd);
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__free_page(table);
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}
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/* Clear the PMD. */
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*pmd = __pmd(0);
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ipmmu_flush_pgtable(mmu, pmd, sizeof(*pmd));
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/* Free the page table. */
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if (pmd_table(pmdval)) {
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pgtable_t table = pmd_pgtable(pmdval);
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__free_page(table);
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}
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/* Check whether the PUD is still needed. */
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pmd = pmd_offset(pud, 0);
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for (i = 0; i < IPMMU_PTRS_PER_PMD; ++i) {
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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int ret = 0;
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if (!pgd)
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return -EINVAL;
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@ -844,8 +848,7 @@ static int ipmmu_clear_mapping(struct ipmmu_vmsa_domain *domain,
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done:
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spin_unlock_irqrestore(&domain->lock, flags);
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if (ret)
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ipmmu_tlb_invalidate(domain);
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ipmmu_tlb_invalidate(domain);
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return 0;
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}
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@ -896,6 +899,7 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain,
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struct ipmmu_vmsa_device *mmu = archdata->mmu;
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struct ipmmu_vmsa_domain *domain = io_domain->priv;
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unsigned long flags;
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unsigned int i;
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int ret = 0;
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if (!mmu) {
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if (ret < 0)
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return ret;
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ipmmu_utlb_enable(domain, archdata->utlb);
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for (i = 0; i < archdata->num_utlbs; ++i)
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ipmmu_utlb_enable(domain, archdata->utlbs[i]);
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return 0;
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}
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{
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struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu;
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struct ipmmu_vmsa_domain *domain = io_domain->priv;
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unsigned int i;
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ipmmu_utlb_disable(domain, archdata->utlb);
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for (i = 0; i < archdata->num_utlbs; ++i)
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ipmmu_utlb_disable(domain, archdata->utlbs[i]);
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/*
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* TODO: Optimize by disabling the context when no device is attached.
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@ -999,26 +1006,56 @@ static phys_addr_t ipmmu_iova_to_phys(struct iommu_domain *io_domain,
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return __pfn_to_phys(pte_pfn(pte)) | (iova & ~PAGE_MASK);
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}
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static int ipmmu_find_utlb(struct ipmmu_vmsa_device *mmu, struct device *dev)
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static int ipmmu_find_utlbs(struct ipmmu_vmsa_device *mmu, struct device *dev,
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unsigned int **_utlbs)
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{
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const struct ipmmu_vmsa_master *master = mmu->pdata->masters;
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const char *devname = dev_name(dev);
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unsigned int *utlbs;
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unsigned int i;
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int count;
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for (i = 0; i < mmu->pdata->num_masters; ++i, ++master) {
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if (strcmp(master->name, devname) == 0)
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return master->utlb;
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count = of_count_phandle_with_args(dev->of_node, "iommus",
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"#iommu-cells");
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if (count < 0)
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return -EINVAL;
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utlbs = kcalloc(count, sizeof(*utlbs), GFP_KERNEL);
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if (!utlbs)
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return -ENOMEM;
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for (i = 0; i < count; ++i) {
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struct of_phandle_args args;
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int ret;
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ret = of_parse_phandle_with_args(dev->of_node, "iommus",
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"#iommu-cells", i, &args);
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if (ret < 0)
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goto error;
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of_node_put(args.np);
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if (args.np != mmu->dev->of_node || args.args_count != 1)
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goto error;
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utlbs[i] = args.args[0];
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}
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return -1;
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*_utlbs = utlbs;
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return count;
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error:
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kfree(utlbs);
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return -EINVAL;
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}
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static int ipmmu_add_device(struct device *dev)
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{
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struct ipmmu_vmsa_archdata *archdata;
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struct ipmmu_vmsa_device *mmu;
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struct iommu_group *group;
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int utlb = -1;
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struct iommu_group *group = NULL;
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unsigned int *utlbs = NULL;
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unsigned int i;
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int num_utlbs = 0;
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int ret;
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if (dev->archdata.iommu) {
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spin_lock(&ipmmu_devices_lock);
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list_for_each_entry(mmu, &ipmmu_devices, list) {
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utlb = ipmmu_find_utlb(mmu, dev);
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if (utlb >= 0) {
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num_utlbs = ipmmu_find_utlbs(mmu, dev, &utlbs);
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if (num_utlbs) {
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/*
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* TODO Take a reference to the MMU to protect
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* against device removal.
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spin_unlock(&ipmmu_devices_lock);
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if (utlb < 0)
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if (num_utlbs <= 0)
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return -ENODEV;
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if (utlb >= mmu->num_utlbs)
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return -EINVAL;
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for (i = 0; i < num_utlbs; ++i) {
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if (utlbs[i] >= mmu->num_utlbs) {
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ret = -EINVAL;
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goto error;
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}
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}
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/* Create a device group and add the device to it. */
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group = iommu_group_alloc();
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if (IS_ERR(group)) {
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dev_err(dev, "Failed to allocate IOMMU group\n");
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return PTR_ERR(group);
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ret = PTR_ERR(group);
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goto error;
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}
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ret = iommu_group_add_device(group, dev);
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if (ret < 0) {
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dev_err(dev, "Failed to add device to IPMMU group\n");
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return ret;
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group = NULL;
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goto error;
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}
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archdata = kzalloc(sizeof(*archdata), GFP_KERNEL);
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@ -1071,7 +1114,8 @@ static int ipmmu_add_device(struct device *dev)
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}
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archdata->mmu = mmu;
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archdata->utlb = utlb;
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archdata->utlbs = utlbs;
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archdata->num_utlbs = num_utlbs;
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dev->archdata.iommu = archdata;
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/*
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@ -1090,7 +1134,8 @@ static int ipmmu_add_device(struct device *dev)
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SZ_1G, SZ_2G);
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if (IS_ERR(mapping)) {
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dev_err(mmu->dev, "failed to create ARM IOMMU mapping\n");
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return PTR_ERR(mapping);
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ret = PTR_ERR(mapping);
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goto error;
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}
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mmu->mapping = mapping;
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@ -1106,17 +1151,29 @@ static int ipmmu_add_device(struct device *dev)
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return 0;
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error:
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arm_iommu_release_mapping(mmu->mapping);
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kfree(dev->archdata.iommu);
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kfree(utlbs);
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dev->archdata.iommu = NULL;
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iommu_group_remove_device(dev);
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if (!IS_ERR_OR_NULL(group))
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iommu_group_remove_device(dev);
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return ret;
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}
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static void ipmmu_remove_device(struct device *dev)
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{
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struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu;
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arm_iommu_detach_device(dev);
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iommu_group_remove_device(dev);
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kfree(dev->archdata.iommu);
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kfree(archdata->utlbs);
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kfree(archdata);
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dev->archdata.iommu = NULL;
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}
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@ -1154,7 +1211,7 @@ static int ipmmu_probe(struct platform_device *pdev)
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int irq;
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int ret;
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if (!pdev->dev.platform_data) {
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if (!IS_ENABLED(CONFIG_OF) && !pdev->dev.platform_data) {
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dev_err(&pdev->dev, "missing platform data\n");
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return -EINVAL;
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}
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@ -1166,7 +1223,6 @@ static int ipmmu_probe(struct platform_device *pdev)
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}
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mmu->dev = &pdev->dev;
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mmu->pdata = pdev->dev.platform_data;
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mmu->num_utlbs = 32;
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/* Map I/O memory and request IRQ. */
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@ -1175,6 +1231,20 @@ static int ipmmu_probe(struct platform_device *pdev)
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if (IS_ERR(mmu->base))
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return PTR_ERR(mmu->base);
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/*
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* The IPMMU has two register banks, for secure and non-secure modes.
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* The bank mapped at the beginning of the IPMMU address space
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* corresponds to the running mode of the CPU. When running in secure
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* mode the non-secure register bank is also available at an offset.
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*
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* Secure mode operation isn't clearly documented and is thus currently
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* not implemented in the driver. Furthermore, preliminary tests of
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* non-secure operation with the main register bank were not successful.
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* Offset the registers base unconditionally to point to the non-secure
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* alias space for now.
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*/
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mmu->base += IM_NS_ALIAS_OFFSET;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "no IRQ found\n");
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@ -1220,9 +1290,14 @@ static int ipmmu_remove(struct platform_device *pdev)
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return 0;
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}
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static const struct of_device_id ipmmu_of_ids[] = {
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{ .compatible = "renesas,ipmmu-vmsa", },
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};
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static struct platform_driver ipmmu_driver = {
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.driver = {
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.name = "ipmmu-vmsa",
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.of_match_table = of_match_ptr(ipmmu_of_ids),
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},
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.probe = ipmmu_probe,
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.remove = ipmmu_remove,
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@ -1,24 +0,0 @@
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/*
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* IPMMU VMSA Platform Data
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __IPMMU_VMSA_H__
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#define __IPMMU_VMSA_H__
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struct ipmmu_vmsa_master {
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const char *name;
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unsigned int utlb;
|
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};
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struct ipmmu_vmsa_platform_data {
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const struct ipmmu_vmsa_master *masters;
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unsigned int num_masters;
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};
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#endif /* __IPMMU_VMSA_H__ */
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