PCI: save and restore PCIe 2.0 registers
PCIe 2.0 defines several new registers (Device Control 2, Link Control 2, and Slot Control 2). Save and retore them in pci_save_pcie_state() and pci_restore_pcie_state(). Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -647,6 +647,8 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state)
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EXPORT_SYMBOL(pci_choose_state);
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EXPORT_SYMBOL(pci_choose_state);
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#define PCI_EXP_SAVE_REGS 7
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static int pci_save_pcie_state(struct pci_dev *dev)
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static int pci_save_pcie_state(struct pci_dev *dev)
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{
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{
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int pos, i = 0;
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int pos, i = 0;
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@ -668,6 +670,9 @@ static int pci_save_pcie_state(struct pci_dev *dev)
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pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]);
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pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]);
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pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]);
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pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]);
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pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]);
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pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]);
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pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &cap[i++]);
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pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
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pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
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return 0;
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return 0;
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}
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}
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@ -688,6 +693,9 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
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pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
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pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
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pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
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pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
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pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
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pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, cap[i++]);
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pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]);
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pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
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}
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}
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@ -1372,7 +1380,8 @@ void pci_allocate_cap_save_buffers(struct pci_dev *dev)
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{
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{
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int error;
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int error;
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error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_EXP, 4 * sizeof(u16));
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error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_EXP,
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PCI_EXP_SAVE_REGS * sizeof(u16));
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if (error)
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if (error)
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dev_err(&dev->dev,
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dev_err(&dev->dev,
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"unable to preallocate PCI Express save buffer\n");
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"unable to preallocate PCI Express save buffer\n");
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@ -488,6 +488,8 @@
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#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
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#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
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#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
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#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
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#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
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#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
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#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
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#define PCI_EXP_SLTCTL2 56 /* Slot Control 2 */
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/* Extended Capabilities (PCI-X 2.0 and Express) */
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/* Extended Capabilities (PCI-X 2.0 and Express) */
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#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
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#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
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