drm/armada: disable planes at next blanking period
Disable planes at the next blanking period rather than immediately. In order to achieve this, we need to delay the clearing of dcrtc->plane until after the next blanking period, so move that into a separate work function. To avoid races, we also need to move its assignment in the overlay code. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@ -293,6 +293,19 @@ static void armada_drm_crtc_complete_frame_work(struct armada_crtc *dcrtc,
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spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
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}
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static void armada_drm_crtc_complete_disable_work(struct armada_crtc *dcrtc,
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struct armada_plane_work *work)
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{
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unsigned long flags;
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if (dcrtc->plane == work->plane)
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dcrtc->plane = NULL;
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spin_lock_irqsave(&dcrtc->irq_lock, flags);
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armada_drm_crtc_update_regs(dcrtc, work->regs);
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spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
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}
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static struct armada_plane_work *
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armada_drm_crtc_alloc_plane_work(struct drm_plane *plane)
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{
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@ -392,8 +405,11 @@ static void armada_drm_crtc_prepare(struct drm_crtc *crtc)
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* the new mode parameters.
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*/
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plane = dcrtc->plane;
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if (plane)
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if (plane) {
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drm_plane_force_disable(plane);
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WARN_ON(!armada_drm_plane_work_wait(drm_to_armada_plane(plane),
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HZ));
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}
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}
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/* The mode_config.mutex will be held for this call */
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@ -1120,28 +1136,22 @@ int armada_drm_plane_disable(struct drm_plane *plane,
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{
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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struct armada_crtc *dcrtc;
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struct armada_plane_work *work;
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unsigned int idx = 0;
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u32 sram_para1, enable_mask;
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if (!plane->crtc)
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return 0;
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/*
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* Drop our reference on any framebuffer attached to this plane.
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* We don't need to NULL this out as drm_plane_force_disable(),
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* and __setplane_internal() will do so for an overlay plane, and
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* __drm_helper_disable_unused_functions() will do so for the
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* primary plane.
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* Arrange to power down most RAMs and FIFOs if this is the primary
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* plane, otherwise just the YUV FIFOs for the overlay plane.
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*/
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if (plane->fb)
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drm_framebuffer_put(plane->fb);
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/* Power down most RAMs and FIFOs if this is the primary plane */
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if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
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sram_para1 = CFG_PDWN256x32 | CFG_PDWN256x24 | CFG_PDWN256x8 |
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CFG_PDWN32x32 | CFG_PDWN64x66;
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enable_mask = CFG_GRA_ENA;
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} else {
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/* Power down the Y/U/V FIFOs */
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sram_para1 = CFG_PDWN16x66 | CFG_PDWN32x66;
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enable_mask = CFG_DMA_ENA;
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}
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@ -1150,14 +1160,33 @@ int armada_drm_plane_disable(struct drm_plane *plane,
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dcrtc = drm_to_armada_crtc(plane->crtc);
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/*
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* Try to disable the plane and drop our ref on the framebuffer
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* at the next frame update. If we fail for any reason, disable
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* the plane immediately.
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*/
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work = &dplane->works[dplane->next_work];
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work->fn = armada_drm_crtc_complete_disable_work;
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work->cancel = armada_drm_crtc_complete_disable_work;
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work->old_fb = plane->fb;
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armada_reg_queue_mod(work->regs, idx,
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0, enable_mask, LCD_SPU_DMA_CTRL0);
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armada_reg_queue_mod(work->regs, idx,
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sram_para1, 0, LCD_SPU_SRAM_PARA1);
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armada_reg_queue_end(work->regs, idx);
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/* Wait for any preceding work to complete, but don't wedge */
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if (WARN_ON(!armada_drm_plane_work_wait(dplane, HZ)))
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armada_drm_plane_work_cancel(dcrtc, dplane);
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spin_lock_irq(&dcrtc->irq_lock);
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armada_updatel(0, enable_mask, dcrtc->base + LCD_SPU_DMA_CTRL0);
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armada_updatel(sram_para1, 0, dcrtc->base + LCD_SPU_SRAM_PARA1);
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spin_unlock_irq(&dcrtc->irq_lock);
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if (armada_drm_plane_work_queue(dcrtc, work)) {
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work->fn(dcrtc, work);
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if (work->old_fb)
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drm_framebuffer_unreference(work->old_fb);
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}
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dplane->next_work = !dplane->next_work;
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return 0;
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}
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@ -140,11 +140,6 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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dplane->base.state.src_x != state.src.x1 >> 16 ||
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dplane->base.state.src_y != state.src.y1 >> 16;
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if (!dcrtc->plane) {
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dcrtc->plane = plane;
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armada_ovl_update_attr(&dplane->prop, dcrtc);
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}
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/* FIXME: overlay on an interlaced display */
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/* Just updating the position/size? */
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if (!fb_changed && dplane->base.state.ctrl0 == ctrl0) {
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@ -173,6 +168,11 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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if (armada_drm_plane_work_wait(&dplane->base, HZ / 25) == 0)
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armada_drm_plane_work_cancel(dcrtc, &dplane->base);
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if (!dcrtc->plane) {
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dcrtc->plane = plane;
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armada_ovl_update_attr(&dplane->prop, dcrtc);
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}
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if (fb_changed) {
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u32 addrs[3];
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@ -255,17 +255,6 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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return 0;
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}
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static int armada_ovl_plane_disable(struct drm_plane *plane,
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struct drm_modeset_acquire_ctx *ctx)
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{
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armada_drm_plane_disable(plane, ctx);
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if (plane->crtc)
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drm_to_armada_crtc(plane->crtc)->plane = NULL;
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return 0;
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}
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static void armada_ovl_plane_destroy(struct drm_plane *plane)
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{
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struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
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@ -345,7 +334,7 @@ static int armada_ovl_plane_set_property(struct drm_plane *plane,
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static const struct drm_plane_funcs armada_ovl_plane_funcs = {
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.update_plane = armada_ovl_plane_update,
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.disable_plane = armada_ovl_plane_disable,
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.disable_plane = armada_drm_plane_disable,
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.destroy = armada_ovl_plane_destroy,
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.set_property = armada_ovl_plane_set_property,
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};
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