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Merge branch 'treewide/cleanup' into next/soc 

Merge in cleanup to avoid internal conflicts with newly added code.

* treewide/cleanup:
  ARM: use "depends on" for SoC configs instead of "if" after prompt
  ARM/clocksource: use automatic DT probing for ux500 PRCMU
  ARM: use const and __initconst for smp_operations
  ARM: hisi: do not export smp_operations structures

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-12-22 13:10:00 -08:00
parent 9cdac4a20a e324654294
commit 8907dbaa36
94 changed files with 181 additions and 203 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/Kconfig
View File

@ -796,7 +796,8 @@ config ARCH_MULTI_CPU_AUTO
endmenu
config ARCH_VIRT
bool "Dummy Virtual Machine" if ARCH_MULTI_V7
bool "Dummy Virtual Machine"
depends on ARCH_MULTI_V7
select ARM_AMBA
select ARM_GIC
select ARM_GIC_V3

2
arch/arm/common/mcpm_platsmp.c
View File

@ -83,7 +83,7 @@ static void mcpm_cpu_die(unsigned int cpu)
#endif
static struct smp_operations __initdata mcpm_smp_ops = {
static const struct smp_operations mcpm_smp_ops __initconst = {
.smp_boot_secondary = mcpm_boot_secondary,
.smp_secondary_init = mcpm_secondary_init,
#ifdef CONFIG_HOTPLUG_CPU

2
arch/arm/include/asm/psci.h
View File

@ -14,7 +14,7 @@
#ifndef __ASM_ARM_PSCI_H
#define __ASM_ARM_PSCI_H
extern struct smp_operations psci_smp_ops;
extern const struct smp_operations psci_smp_ops;
#ifdef CONFIG_ARM_PSCI
bool psci_smp_available(void);

2
arch/arm/kernel/psci_smp.c
View File

@ -120,7 +120,7 @@ bool __init psci_smp_available(void)
return (psci_ops.cpu_on != NULL);
}
struct smp_operations __initdata psci_smp_ops = {
const struct smp_operations psci_smp_ops __initconst = {
.smp_boot_secondary = psci_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_disable = psci_cpu_disable,

3
arch/arm/mach-alpine/Kconfig
View File

@ -1,5 +1,6 @@
config ARCH_ALPINE
bool "Annapurna Labs Alpine platform" if ARCH_MULTI_V7
bool "Annapurna Labs Alpine platform"
depends on ARCH_MULTI_V7
select ARM_AMBA
select ARM_GIC
select GENERIC_IRQ_CHIP

2
arch/arm/mach-alpine/platsmp.c
View File

@ -42,7 +42,7 @@ static void __init alpine_smp_prepare_cpus(unsigned int max_cpus)
alpine_cpu_pm_init();
}
static struct smp_operations alpine_smp_ops __initdata = {
static const struct smp_operations alpine_smp_ops __initconst = {
.smp_prepare_cpus = alpine_smp_prepare_cpus,
.smp_boot_secondary = alpine_boot_secondary,
};

15
arch/arm/mach-at91/Kconfig
View File

@ -9,7 +9,8 @@ menuconfig ARCH_AT91
if ARCH_AT91
config SOC_SAMA5D2
bool "SAMA5D2 family" if ARCH_MULTI_V7
bool "SAMA5D2 family"
depends on ARCH_MULTI_V7
select SOC_SAMA5
select CACHE_L2X0
select HAVE_FB_ATMEL
@ -21,7 +22,8 @@ config SOC_SAMA5D2
Select this if ou are using one of Atmel's SAMA5D2 family SoC.
config SOC_SAMA5D3
bool "SAMA5D3 family" if ARCH_MULTI_V7
bool "SAMA5D3 family"
depends on ARCH_MULTI_V7
select SOC_SAMA5
select HAVE_FB_ATMEL
select HAVE_AT91_UTMI
@ -32,7 +34,8 @@ config SOC_SAMA5D3
This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
config SOC_SAMA5D4
bool "SAMA5D4 family" if ARCH_MULTI_V7
bool "SAMA5D4 family"
depends on ARCH_MULTI_V7
select SOC_SAMA5
select CACHE_L2X0
select HAVE_FB_ATMEL
@ -44,7 +47,8 @@ config SOC_SAMA5D4
Select this if you are using one of Atmel's SAMA5D4 family SoC.
config SOC_AT91RM9200
bool "AT91RM9200" if ARCH_MULTI_V4T
bool "AT91RM9200"
depends on ARCH_MULTI_V4T
select ATMEL_AIC_IRQ
select ATMEL_ST
select CPU_ARM920T
@ -56,7 +60,8 @@ config SOC_AT91RM9200
Select this if you are using Atmel's AT91RM9200 SoC.
config SOC_AT91SAM9
bool "AT91SAM9" if ARCH_MULTI_V5
bool "AT91SAM9"
depends on ARCH_MULTI_V5
select ATMEL_AIC_IRQ
select ATMEL_SDRAMC
select CPU_ARM926T

3
arch/arm/mach-axxia/Kconfig
View File

@ -1,5 +1,6 @@
config ARCH_AXXIA
bool "LSI Axxia platforms" if (ARCH_MULTI_V7 && ARM_LPAE)
bool "LSI Axxia platforms"
depends on ARCH_MULTI_V7 && ARM_LPAE
select ARCH_DMA_ADDR_T_64BIT
select ARM_AMBA
select ARM_GIC

2
arch/arm/mach-axxia/platsmp.c
View File

@ -82,7 +82,7 @@ static void __init axxia_smp_prepare_cpus(unsigned int max_cpus)
}
}
static struct smp_operations axxia_smp_ops __initdata = {
static const struct smp_operations axxia_smp_ops __initconst = {
.smp_prepare_cpus = axxia_smp_prepare_cpus,
.smp_boot_secondary = axxia_boot_secondary,
};

27
arch/arm/mach-bcm/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_BCM
bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7
bool "Broadcom SoC Support"
depends on ARCH_MULTI_V6_V7
help
This enables support for Broadcom ARM based SoC chips
@ -27,7 +28,8 @@ config ARCH_BCM_IPROC
Currently supported SoCs are Cygnus.
config ARCH_BCM_CYGNUS
bool "Broadcom Cygnus Support" if ARCH_MULTI_V7
bool "Broadcom Cygnus Support"
depends on ARCH_MULTI_V7
select ARCH_BCM_IPROC
help
Enable support for the Cygnus family,
@ -36,7 +38,8 @@ config ARCH_BCM_CYGNUS
BCM58300, BCM58302, BCM58303, BCM58305.
config ARCH_BCM_NSP
bool "Broadcom Northstar Plus SoC Support" if ARCH_MULTI_V7
bool "Broadcom Northstar Plus SoC Support"
depends on ARCH_MULTI_V7
select ARCH_BCM_IPROC
select ARM_ERRATA_754322
select ARM_ERRATA_775420
@ -52,7 +55,8 @@ config ARCH_BCM_NSP
NAND flash, SATA and several other IO controllers.
config ARCH_BCM_5301X
bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
bool "Broadcom BCM470X / BCM5301X ARM SoC"
depends on ARCH_MULTI_V7
select ARCH_BCM_IPROC
select ARM_ERRATA_754322
select ARM_ERRATA_775420
@ -89,7 +93,8 @@ config ARCH_BCM_MOBILE
This enables support for systems based on Broadcom mobile SoCs.
config ARCH_BCM_281XX
bool "Broadcom BCM281XX SoC family" if ARCH_MULTI_V7
bool "Broadcom BCM281XX SoC family"
depends on ARCH_MULTI_V7
select ARCH_BCM_MOBILE
select HAVE_SMP
help
@ -98,7 +103,8 @@ config ARCH_BCM_281XX
variants.
config ARCH_BCM_21664
bool "Broadcom BCM21664 SoC family" if ARCH_MULTI_V7
bool "Broadcom BCM21664 SoC family"
depends on ARCH_MULTI_V7
select ARCH_BCM_MOBILE
select HAVE_SMP
help
@ -129,7 +135,8 @@ config ARCH_BCM_MOBILE_SMP
comment "Other Architectures"
config ARCH_BCM2835
bool "Broadcom BCM2835 family" if ARCH_MULTI_V6
bool "Broadcom BCM2835 family"
depends on ARCH_MULTI_V6
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
select ARM_ERRATA_411920
@ -142,7 +149,8 @@ config ARCH_BCM2835
used in the Raspberry Pi and Roku 2 devices.
config ARCH_BCM_63XX
bool "Broadcom BCM63xx DSL SoC" if ARCH_MULTI_V7
bool "Broadcom BCM63xx DSL SoC"
depends on ARCH_MULTI_V7
depends on MMU
select ARM_ERRATA_754322
select ARM_ERRATA_764369 if SMP
@ -159,7 +167,8 @@ config ARCH_BCM_63XX
the BCM63138 variant.
config ARCH_BRCMSTB
bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7
bool "Broadcom BCM7XXX based boards"
depends on ARCH_MULTI_V7
select ARM_GIC
select ARM_ERRATA_798181 if SMP
select HAVE_ARM_ARCH_TIMER

2
arch/arm/mach-bcm/bcm63xx_smp.c
View File

@ -161,7 +161,7 @@ static void __init bcm63138_smp_prepare_cpus(unsigned int max_cpus)
}
}
struct smp_operations bcm63138_smp_ops __initdata = {
static const struct smp_operations bcm63138_smp_ops __initconst = {
.smp_prepare_cpus = bcm63138_smp_prepare_cpus,
.smp_boot_secondary = bcm63138_smp_boot_secondary,
};

2
arch/arm/mach-bcm/platsmp-brcmstb.c
View File

@ -356,7 +356,7 @@ static int brcmstb_boot_secondary(unsigned int cpu, struct task_struct *idle)
return 0;
}
static struct smp_operations brcmstb_smp_ops __initdata = {
static const struct smp_operations brcmstb_smp_ops __initconst = {
.smp_prepare_cpus = brcmstb_cpu_ctrl_setup,
.smp_boot_secondary = brcmstb_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

2
arch/arm/mach-bcm/platsmp.c
View File

@ -276,7 +276,7 @@ out:
return ret;
}
static struct smp_operations bcm_smp_ops __initdata = {
static const struct smp_operations bcm_smp_ops __initconst = {
.smp_prepare_cpus = bcm_smp_prepare_cpus,
.smp_boot_secondary = kona_boot_secondary,
};

3
arch/arm/mach-berlin/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_BERLIN
bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
bool "Marvell Berlin SoCs"
depends on ARCH_MULTI_V7
select ARCH_HAS_RESET_CONTROLLER
select ARCH_REQUIRE_GPIOLIB
select ARM_GIC

2
arch/arm/mach-berlin/platsmp.c
View File

@ -119,7 +119,7 @@ static int berlin_cpu_kill(unsigned int cpu)
}
#endif
static struct smp_operations berlin_smp_ops __initdata = {
static const struct smp_operations berlin_smp_ops __initconst = {
.smp_prepare_cpus = berlin_smp_prepare_cpus,
.smp_boot_secondary = berlin_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

3
arch/arm/mach-cns3xxx/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_CNS3XXX
bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
bool "Cavium Networks CNS3XXX family"
depends on ARCH_MULTI_V6
select ARM_GIC
select PCI_DOMAINS if PCI
help

3
arch/arm/mach-exynos/Kconfig
View File

@ -8,7 +8,8 @@
# Configuration options for the EXYNOS4
menuconfig ARCH_EXYNOS
bool "Samsung EXYNOS" if ARCH_MULTI_V7
bool "Samsung EXYNOS"
depends on ARCH_MULTI_V7
select ARCH_HAS_BANDGAP
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_REQUIRE_GPIOLIB

2
arch/arm/mach-exynos/common.h
View File

@ -149,7 +149,7 @@ static inline void exynos_pm_init(void) {}
extern void exynos_cpu_resume(void);
extern void exynos_cpu_resume_ns(void);
extern struct smp_operations exynos_smp_ops;
extern const struct smp_operations exynos_smp_ops;
extern void exynos_cpu_power_down(int cpu);
extern void exynos_cpu_power_up(int cpu);

2
arch/arm/mach-exynos/platsmp.c
View File

@ -479,7 +479,7 @@ static void exynos_cpu_die(unsigned int cpu)
}
#endif /* CONFIG_HOTPLUG_CPU */
struct smp_operations exynos_smp_ops __initdata = {
const struct smp_operations exynos_smp_ops __initconst = {
.smp_init_cpus = exynos_smp_init_cpus,
.smp_prepare_cpus = exynos_smp_prepare_cpus,
.smp_secondary_init = exynos_secondary_init,

3
arch/arm/mach-highbank/Kconfig
View File

@ -1,5 +1,6 @@
config ARCH_HIGHBANK
bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7
bool "Calxeda ECX-1000/2000 (Highbank/Midway)"
depends on ARCH_MULTI_V7
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_SUPPORTS_BIG_ENDIAN

12
arch/arm/mach-hisi/Kconfig
View File

@ -13,7 +13,8 @@ if ARCH_HISI
menu "Hisilicon platform type"
config ARCH_HI3xxx
bool "Hisilicon Hi36xx family" if ARCH_MULTI_V7
bool "Hisilicon Hi36xx family"
depends on ARCH_MULTI_V7
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
@ -23,7 +24,8 @@ config ARCH_HI3xxx
Support for Hisilicon Hi36xx SoC family
config ARCH_HIP01
bool "Hisilicon HIP01 family" if ARCH_MULTI_V7
bool "Hisilicon HIP01 family"
depends on ARCH_MULTI_V7
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select ARM_GLOBAL_TIMER
@ -31,7 +33,8 @@ config ARCH_HIP01
Support for Hisilicon HIP01 SoC family
config ARCH_HIP04
bool "Hisilicon HiP04 Cortex A15 family" if ARCH_MULTI_V7
bool "Hisilicon HiP04 Cortex A15 family"
depends on ARCH_MULTI_V7
select ARM_ERRATA_798181 if SMP
select HAVE_ARM_ARCH_TIMER
select MCPM if SMP
@ -40,7 +43,8 @@ config ARCH_HIP04
Support for Hisilicon HiP04 SoC family
config ARCH_HIX5HD2
bool "Hisilicon X5HD2 family" if ARCH_MULTI_V7
bool "Hisilicon X5HD2 family"
depends on ARCH_MULTI_V7
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP

3
arch/arm/mach-hisi/core.h
View File

@ -6,17 +6,14 @@
extern void hi3xxx_set_cpu_jump(int cpu, void *jump_addr);
extern int hi3xxx_get_cpu_jump(int cpu);
extern void secondary_startup(void);
extern struct smp_operations hi3xxx_smp_ops;
extern void hi3xxx_cpu_die(unsigned int cpu);
extern int hi3xxx_cpu_kill(unsigned int cpu);
extern void hi3xxx_set_cpu(int cpu, bool enable);
extern struct smp_operations hix5hd2_smp_ops;
extern void hix5hd2_set_cpu(int cpu, bool enable);
extern void hix5hd2_cpu_die(unsigned int cpu);
extern struct smp_operations hip01_smp_ops;
extern void hip01_set_cpu(int cpu, bool enable);
extern void hip01_cpu_die(unsigned int cpu);
#endif

2
arch/arm/mach-hisi/platmcpm.c
View File

@ -239,7 +239,7 @@ err:
}
#endif
static struct smp_operations __initdata hip04_smp_ops = {
static const struct smp_operations hip04_smp_ops __initconst = {
.smp_boot_secondary = hip04_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_die = hip04_cpu_die,

6
arch/arm/mach-hisi/platsmp.c
View File

@ -89,7 +89,7 @@ static int hi3xxx_boot_secondary(unsigned int cpu, struct task_struct *idle)
return 0;
}
struct smp_operations hi3xxx_smp_ops __initdata = {
static const struct smp_operations hi3xxx_smp_ops __initconst = {
.smp_prepare_cpus = hi3xxx_smp_prepare_cpus,
.smp_boot_secondary = hi3xxx_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
@ -126,7 +126,7 @@ static int hix5hd2_boot_secondary(unsigned int cpu, struct task_struct *idle)
}
struct smp_operations hix5hd2_smp_ops __initdata = {
static const struct smp_operations hix5hd2_smp_ops __initconst = {
.smp_prepare_cpus = hisi_common_smp_prepare_cpus,
.smp_boot_secondary = hix5hd2_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
@ -176,7 +176,7 @@ static int hip01_boot_secondary(unsigned int cpu, struct task_struct *idle)
return 0;
}
struct smp_operations hip01_smp_ops __initdata = {
static const struct smp_operations hip01_smp_ops __initconst = {
.smp_prepare_cpus = hisi_common_smp_prepare_cpus,
.smp_boot_secondary = hip01_boot_secondary,
};

6
arch/arm/mach-imx/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_MXC
bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M
bool "Freescale i.MX family"
depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M
select ARCH_REQUIRE_GPIOLIB
select ARM_CPU_SUSPEND if PM
select CLKSRC_IMX_GPT
@ -596,7 +597,8 @@ choice
default VF_USE_ARM_GLOBAL_TIMER
config VF_USE_ARM_GLOBAL_TIMER
bool "Use ARM Global Timer" if ARCH_MULTI_V7
bool "Use ARM Global Timer"
depends on ARCH_MULTI_V7
select ARM_GLOBAL_TIMER
select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
help

4
arch/arm/mach-imx/common.h
View File

@ -153,7 +153,7 @@ void imx_init_l2cache(void);
static inline void imx_init_l2cache(void) {}
#endif
extern struct smp_operations imx_smp_ops;
extern struct smp_operations ls1021a_smp_ops;
extern const struct smp_operations imx_smp_ops;
extern const struct smp_operations ls1021a_smp_ops;
#endif

4
arch/arm/mach-imx/platsmp.c
View File

@ -88,7 +88,7 @@ static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
sync_cache_w(&g_diag_reg);
}
struct smp_operations imx_smp_ops __initdata = {
const struct smp_operations imx_smp_ops __initconst = {
.smp_init_cpus = imx_smp_init_cpus,
.smp_prepare_cpus = imx_smp_prepare_cpus,
.smp_boot_secondary = imx_boot_secondary,
@ -123,7 +123,7 @@ static void __init ls1021a_smp_prepare_cpus(unsigned int max_cpus)
iounmap(dcfg_base);
}
struct smp_operations ls1021a_smp_ops __initdata = {
const struct smp_operations ls1021a_smp_ops __initconst = {
.smp_prepare_cpus = ls1021a_smp_prepare_cpus,
.smp_boot_secondary = ls1021a_boot_secondary,
};

3
arch/arm/mach-integrator/Kconfig
View File

@ -1,5 +1,6 @@
config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family" if (ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6)
bool "ARM Ltd. Integrator family"
depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6
select ARM_AMBA
select ARM_PATCH_PHYS_VIRT if MMU
select AUTO_ZRELADDR

2
arch/arm/mach-keystone/keystone.h
View File

@ -15,7 +15,7 @@
#ifndef __ASSEMBLER__
extern struct smp_operations keystone_smp_ops;
extern const struct smp_operations keystone_smp_ops;
extern void secondary_startup(void);
extern u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr);
extern int keystone_pm_runtime_init(void);

2
arch/arm/mach-keystone/platsmp.c
View File

@ -39,6 +39,6 @@ static int keystone_smp_boot_secondary(unsigned int cpu,
return error;
}
struct smp_operations keystone_smp_ops __initdata = {
const struct smp_operations keystone_smp_ops __initconst = {
.smp_boot_secondary = keystone_smp_boot_secondary,
};

3
arch/arm/mach-mediatek/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_MEDIATEK
bool "Mediatek MT65xx & MT81xx SoC" if ARCH_MULTI_V7
bool "Mediatek MT65xx & MT81xx SoC"
depends on ARCH_MULTI_V7
select ARM_GIC
select PINCTRL
select MTK_TIMER

4
arch/arm/mach-mediatek/platsmp.c
View File

@ -128,13 +128,13 @@ static void __init mtk_smp_prepare_cpus(unsigned int max_cpus)
__mtk_smp_prepare_cpus(max_cpus, 0);
}
static struct smp_operations mt81xx_tz_smp_ops __initdata = {
static const struct smp_operations mt81xx_tz_smp_ops __initconst = {
.smp_prepare_cpus = mtk_tz_smp_prepare_cpus,
.smp_boot_secondary = mtk_boot_secondary,
};
CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops);
static struct smp_operations mt6589_smp_ops __initdata = {
static const struct smp_operations mt6589_smp_ops __initconst = {
.smp_prepare_cpus = mtk_smp_prepare_cpus,
.smp_boot_secondary = mtk_boot_secondary,
};

3
arch/arm/mach-meson/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_MESON
bool "Amlogic Meson SoCs" if ARCH_MULTI_V7
bool "Amlogic Meson SoCs"
depends on ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select GENERIC_IRQ_CHIP
select ARM_GIC

3
arch/arm/mach-moxart/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_MOXART
bool "MOXA ART SoC" if ARCH_MULTI_V4
bool "MOXA ART SoC"
depends on ARCH_MULTI_V4
select CPU_FA526
select ARM_DMA_MEM_BUFFERABLE
select CLKSRC_MMIO

24
arch/arm/mach-mvebu/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_MVEBU
bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
bool "Marvell Engineering Business Unit (MVEBU) SoCs"
depends on ARCH_MULTI_V7 || ARCH_MULTI_V5
select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_MMIO
select GENERIC_IRQ_CHIP
@ -25,7 +26,8 @@ config MACH_MVEBU_V7
select MACH_MVEBU_ANY
config MACH_ARMADA_370
bool "Marvell Armada 370 boards" if ARCH_MULTI_V7
bool "Marvell Armada 370 boards"
depends on ARCH_MULTI_V7
select ARMADA_370_CLK
select CPU_PJ4B
select MACH_MVEBU_V7
@ -35,7 +37,8 @@ config MACH_ARMADA_370
on the Marvell Armada 370 SoC with device tree.
config MACH_ARMADA_375
bool "Marvell Armada 375 boards" if ARCH_MULTI_V7
bool "Marvell Armada 375 boards"
depends on ARCH_MULTI_V7
select ARM_ERRATA_720789
select ARM_ERRATA_753970
select ARM_GIC
@ -50,7 +53,8 @@ config MACH_ARMADA_375
on the Marvell Armada 375 SoC with device tree.
config MACH_ARMADA_38X
bool "Marvell Armada 380/385 boards" if ARCH_MULTI_V7
bool "Marvell Armada 380/385 boards"
depends on ARCH_MULTI_V7
select ARM_ERRATA_720789
select ARM_ERRATA_753970
select ARM_GIC
@ -65,7 +69,8 @@ config MACH_ARMADA_38X
on the Marvell Armada 380/385 SoC with device tree.
config MACH_ARMADA_39X
bool "Marvell Armada 39x boards" if ARCH_MULTI_V7
bool "Marvell Armada 39x boards"
depends on ARCH_MULTI_V7
select ARM_GIC
select ARMADA_39X_CLK
select CACHE_L2X0
@ -79,7 +84,8 @@ config MACH_ARMADA_39X
on the Marvell Armada 39x SoC with device tree.
config MACH_ARMADA_XP
bool "Marvell Armada XP boards" if ARCH_MULTI_V7
bool "Marvell Armada XP boards"
depends on ARCH_MULTI_V7
select ARMADA_XP_CLK
select CPU_PJ4B
select MACH_MVEBU_V7
@ -89,7 +95,8 @@ config MACH_ARMADA_XP
on the Marvell Armada XP SoC with device tree.
config MACH_DOVE
bool "Marvell Dove boards" if ARCH_MULTI_V7
bool "Marvell Dove boards"
depends on ARCH_MULTI_V7
select CACHE_L2X0
select CPU_PJ4
select DOVE_CLK
@ -103,7 +110,8 @@ config MACH_DOVE
Marvell Dove using flattened device tree.
config MACH_KIRKWOOD
bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
bool "Marvell Kirkwood boards"
depends on ARCH_MULTI_V5
select ARCH_REQUIRE_GPIOLIB
select CPU_FEROCEON
select KIRKWOOD_CLK

2
arch/arm/mach-mvebu/armada-370-xp.h
View File

@ -17,7 +17,7 @@
#ifdef CONFIG_SMP
void armada_xp_secondary_startup(void);
extern struct smp_operations armada_xp_smp_ops;
extern const struct smp_operations armada_xp_smp_ops;
#endif
#endif /* __MACH_ARMADA_370_XP_H */

4
arch/arm/mach-mvebu/platsmp-a9.c
View File

@ -93,11 +93,11 @@ static int armada_38x_cpu_kill(unsigned int cpu)
}
#endif
static struct smp_operations mvebu_cortex_a9_smp_ops __initdata = {
static const struct smp_operations mvebu_cortex_a9_smp_ops __initconst = {
.smp_boot_secondary = mvebu_cortex_a9_boot_secondary,
};
static struct smp_operations armada_38x_smp_ops __initdata = {
static const struct smp_operations armada_38x_smp_ops __initconst = {
.smp_boot_secondary = mvebu_cortex_a9_boot_secondary,
.smp_secondary_init = armada_38x_secondary_init,
#ifdef CONFIG_HOTPLUG_CPU

2
arch/arm/mach-mvebu/platsmp.c
View File

@ -170,7 +170,7 @@ static int armada_xp_cpu_kill(unsigned int cpu)
}
#endif
struct smp_operations armada_xp_smp_ops __initdata = {
const struct smp_operations armada_xp_smp_ops __initconst = {
.smp_init_cpus = armada_xp_smp_init_cpus,
.smp_prepare_cpus = armada_xp_smp_prepare_cpus,
.smp_boot_secondary = armada_xp_boot_secondary,

2
arch/arm/mach-omap2/common.h
View File

@ -270,7 +270,7 @@ extern u32 omap_read_auxcoreboot0(void);
extern void omap4_cpu_die(unsigned int cpu);
extern struct smp_operations omap4_smp_ops;
extern const struct smp_operations omap4_smp_ops;
extern void omap5_secondary_startup(void);
extern void omap5_secondary_hyp_startup(void);

2
arch/arm/mach-omap2/omap-smp.c
View File

@ -241,7 +241,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
}
struct smp_operations omap4_smp_ops __initdata = {
const struct smp_operations omap4_smp_ops __initconst = {
.smp_init_cpus = omap4_smp_init_cpus,
.smp_prepare_cpus = omap4_smp_prepare_cpus,
.smp_secondary_init = omap4_secondary_init,

3
arch/arm/mach-picoxcell/Kconfig
View File

@ -1,5 +1,6 @@
config ARCH_PICOXCELL
bool "Picochip PicoXcell" if ARCH_MULTI_V6
bool "Picochip PicoXcell"
depends on ARCH_MULTI_V6
select ARCH_REQUIRE_GPIOLIB
select ARM_VIC
select DW_APB_TIMER_OF

3
arch/arm/mach-prima2/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_SIRF
bool "CSR SiRF" if ARCH_MULTI_V7
bool "CSR SiRF"
depends on ARCH_MULTI_V7
select ARCH_HAS_RESET_CONTROLLER
select ARCH_REQUIRE_GPIOLIB
select GENERIC_IRQ_CHIP

2
arch/arm/mach-prima2/common.h
View File

@ -15,7 +15,7 @@
#include <asm/mach/time.h>
#include <asm/exception.h>
extern struct smp_operations sirfsoc_smp_ops;
extern const struct smp_operations sirfsoc_smp_ops;
extern void sirfsoc_secondary_startup(void);
extern void sirfsoc_cpu_die(unsigned int cpu);

2
arch/arm/mach-prima2/platsmp.c
View File

@ -112,7 +112,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
return pen_release != -1 ? -ENOSYS : 0;
}
struct smp_operations sirfsoc_smp_ops __initdata = {
const struct smp_operations sirfsoc_smp_ops __initconst = {
.smp_secondary_init = sirfsoc_secondary_init,
.smp_boot_secondary = sirfsoc_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

3
arch/arm/mach-qcom/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_QCOM
bool "Qualcomm Support" if ARCH_MULTI_V7
bool "Qualcomm Support"
depends on ARCH_MULTI_V7
select ARCH_SUPPORTS_BIG_ENDIAN
select ARM_GIC
select ARM_AMBA

6
arch/arm/mach-qcom/platsmp.c
View File

@ -332,7 +332,7 @@ static void __init qcom_smp_prepare_cpus(unsigned int max_cpus)
}
}
static struct smp_operations smp_msm8660_ops __initdata = {
static const struct smp_operations smp_msm8660_ops __initconst = {
.smp_prepare_cpus = qcom_smp_prepare_cpus,
.smp_secondary_init = qcom_secondary_init,
.smp_boot_secondary = msm8660_boot_secondary,
@ -342,7 +342,7 @@ static struct smp_operations smp_msm8660_ops __initdata = {
};
CPU_METHOD_OF_DECLARE(qcom_smp, "qcom,gcc-msm8660", &smp_msm8660_ops);
static struct smp_operations qcom_smp_kpssv1_ops __initdata = {
static const struct smp_operations qcom_smp_kpssv1_ops __initconst = {
.smp_prepare_cpus = qcom_smp_prepare_cpus,
.smp_secondary_init = qcom_secondary_init,
.smp_boot_secondary = kpssv1_boot_secondary,
@ -352,7 +352,7 @@ static struct smp_operations qcom_smp_kpssv1_ops __initdata = {
};
CPU_METHOD_OF_DECLARE(qcom_smp_kpssv1, "qcom,kpss-acc-v1", &qcom_smp_kpssv1_ops);
static struct smp_operations qcom_smp_kpssv2_ops __initdata = {
static const struct smp_operations qcom_smp_kpssv2_ops __initconst = {
.smp_prepare_cpus = qcom_smp_prepare_cpus,
.smp_secondary_init = qcom_secondary_init,
.smp_boot_secondary = kpssv2_boot_secondary,

2
arch/arm/mach-realview/core.h
View File

@ -54,7 +54,7 @@ extern int realview_usb_register(struct resource *res);
extern void realview_init_early(void);
extern void realview_fixup(struct tag *tags, char **from);
extern struct smp_operations realview_smp_ops;
extern const struct smp_operations realview_smp_ops;
extern void realview_cpu_die(unsigned int cpu);
#endif

2
arch/arm/mach-realview/platsmp.c
View File

@ -75,7 +75,7 @@ static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
__io_address(REALVIEW_SYS_FLAGSSET));
}
struct smp_operations realview_smp_ops __initdata = {
const struct smp_operations realview_smp_ops __initconst = {
.smp_init_cpus = realview_smp_init_cpus,
.smp_prepare_cpus = realview_smp_prepare_cpus,
.smp_secondary_init = versatile_secondary_init,

3
arch/arm/mach-rockchip/Kconfig
View File

@ -1,5 +1,6 @@
config ARCH_ROCKCHIP
bool "Rockchip RK2928 and RK3xxx SOCs" if ARCH_MULTI_V7
bool "Rockchip RK2928 and RK3xxx SOCs"
depends on ARCH_MULTI_V7
select PINCTRL
select PINCTRL_ROCKCHIP
select ARCH_HAS_RESET_CONTROLLER

2
arch/arm/mach-rockchip/platsmp.c
View File

@ -360,7 +360,7 @@ static const struct smp_operations rk3036_smp_ops __initconst = {
#endif
};
static struct smp_operations rockchip_smp_ops __initdata = {
static const struct smp_operations rockchip_smp_ops __initconst = {
.smp_prepare_cpus = rockchip_smp_prepare_cpus,
.smp_boot_secondary = rockchip_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

3
arch/arm/mach-s5pv210/Kconfig
View File

@ -8,7 +8,8 @@
# Configuration options for the S5PV210/S5PC110
config ARCH_S5PV210
bool "Samsung S5PV210/S5PC110" if ARCH_MULTI_V7
bool "Samsung S5PV210/S5PC110"
depends on ARCH_MULTI_V7
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_REQUIRE_GPIOLIB
select ARM_VIC

4
arch/arm/mach-shmobile/Kconfig
View File

@ -30,8 +30,8 @@ config ARCH_RMOBILE
select SYS_SUPPORTS_SH_TMU
menuconfig ARCH_SHMOBILE_MULTI
bool "Renesas ARM SoCs" if ARCH_MULTI_V7
depends on MMU
bool "Renesas ARM SoCs"
depends on ARCH_MULTI_V7 && MMU
select ARCH_SHMOBILE
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP

2
arch/arm/mach-shmobile/r8a7779.h
View File

@ -3,6 +3,6 @@
extern void r8a7779_pm_init(void);
extern struct smp_operations r8a7779_smp_ops;
extern const struct smp_operations r8a7779_smp_ops;
#endif /* __ASM_R8A7779_H__ */

2
arch/arm/mach-shmobile/r8a7790.h
View File

@ -1,6 +1,6 @@
#ifndef __ASM_R8A7790_H__
#define __ASM_R8A7790_H__
extern struct smp_operations r8a7790_smp_ops;
extern const struct smp_operations r8a7790_smp_ops;
#endif /* __ASM_R8A7790_H__ */

2
arch/arm/mach-shmobile/r8a7791.h
View File

@ -1,6 +1,6 @@
#ifndef __ASM_R8A7791_H__
#define __ASM_R8A7791_H__
extern struct smp_operations r8a7791_smp_ops;
extern const struct smp_operations r8a7791_smp_ops;
#endif /* __ASM_R8A7791_H__ */

2
arch/arm/mach-shmobile/setup-emev2.c
View File

@ -42,7 +42,7 @@ static const char *const emev2_boards_compat_dt[] __initconst = {
NULL,
};
extern struct smp_operations emev2_smp_ops;
extern const struct smp_operations emev2_smp_ops;
DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
.smp = smp_ops(emev2_smp_ops),

2
arch/arm/mach-shmobile/sh73a0.h
View File

@ -1,6 +1,6 @@
#ifndef __ASM_SH73A0_H__
#define __ASM_SH73A0_H__
extern struct smp_operations sh73a0_smp_ops;
extern const struct smp_operations sh73a0_smp_ops;
#endif /* __ASM_SH73A0_H__ */

2
arch/arm/mach-shmobile/smp-emev2.c
View File

@ -49,7 +49,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
shmobile_smp_scu_prepare_cpus(max_cpus);
}
struct smp_operations emev2_smp_ops __initdata = {
const struct smp_operations emev2_smp_ops __initconst = {
.smp_prepare_cpus = emev2_smp_prepare_cpus,
.smp_boot_secondary = emev2_boot_secondary,
};

2
arch/arm/mach-shmobile/smp-r8a7779.c
View File

@ -117,7 +117,7 @@ static int r8a7779_cpu_kill(unsigned int cpu)
}
#endif /* CONFIG_HOTPLUG_CPU */
struct smp_operations r8a7779_smp_ops __initdata = {
const struct smp_operations r8a7779_smp_ops __initconst = {
.smp_prepare_cpus = r8a7779_smp_prepare_cpus,
.smp_boot_secondary = r8a7779_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

2
arch/arm/mach-shmobile/smp-r8a7790.c
View File

@ -60,7 +60,7 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
rcar_sysc_power_up(&r8a7790_ca7_scu);
}
struct smp_operations r8a7790_smp_ops __initdata = {
const struct smp_operations r8a7790_smp_ops __initconst = {
.smp_prepare_cpus = r8a7790_smp_prepare_cpus,
.smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

2
arch/arm/mach-shmobile/smp-r8a7791.c
View File

@ -54,7 +54,7 @@ static int r8a7791_smp_boot_secondary(unsigned int cpu,
return shmobile_smp_apmu_boot_secondary(cpu, idle);
}
struct smp_operations r8a7791_smp_ops __initdata = {
const struct smp_operations r8a7791_smp_ops __initconst = {
.smp_prepare_cpus = r8a7791_smp_prepare_cpus,
.smp_boot_secondary = r8a7791_smp_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

2
arch/arm/mach-shmobile/smp-sh73a0.c
View File

@ -56,7 +56,7 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
shmobile_smp_scu_prepare_cpus(max_cpus);
}
struct smp_operations sh73a0_smp_ops __initdata = {
const struct smp_operations sh73a0_smp_ops __initconst = {
.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
.smp_boot_secondary = sh73a0_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

3
arch/arm/mach-socfpga/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_SOCFPGA
bool "Altera SOCFPGA family" if ARCH_MULTI_V7
bool "Altera SOCFPGA family"
depends on ARCH_MULTI_V7
select ARCH_SUPPORTS_BIG_ENDIAN
select ARM_AMBA
select ARM_GIC

4
arch/arm/mach-socfpga/platsmp.c
View File

@ -117,7 +117,7 @@ static int socfpga_cpu_kill(unsigned int cpu)
return 1;
}
static struct smp_operations socfpga_smp_ops __initdata = {
static const struct smp_operations socfpga_smp_ops __initconst = {
.smp_prepare_cpus = socfpga_smp_prepare_cpus,
.smp_boot_secondary = socfpga_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
@ -126,7 +126,7 @@ static struct smp_operations socfpga_smp_ops __initdata = {
#endif
};
static struct smp_operations socfpga_a10_smp_ops __initdata = {
static const struct smp_operations socfpga_a10_smp_ops __initconst = {
.smp_prepare_cpus = socfpga_smp_prepare_cpus,
.smp_boot_secondary = socfpga_a10_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

3
arch/arm/mach-spear/Kconfig
View File

@ -3,7 +3,8 @@
#
menuconfig PLAT_SPEAR
bool "ST SPEAr Family" if ARCH_MULTI_V7 || ARCH_MULTI_V5
bool "ST SPEAr Family"
depends on ARCH_MULTI_V7 || ARCH_MULTI_V5
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
select CLKSRC_MMIO

2
arch/arm/mach-spear/generic.h
View File

@ -39,7 +39,7 @@ void spear_restart(enum reboot_mode, const char *);
void spear13xx_secondary_startup(void);
void spear13xx_cpu_die(unsigned int cpu);
extern struct smp_operations spear13xx_smp_ops;
extern const struct smp_operations spear13xx_smp_ops;
#ifdef CONFIG_MACH_SPEAR1310
void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base);

2
arch/arm/mach-spear/platsmp.c
View File

@ -120,7 +120,7 @@ static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus)
__raw_writel(virt_to_phys(spear13xx_secondary_startup), SYS_LOCATION);
}
struct smp_operations spear13xx_smp_ops __initdata = {
const struct smp_operations spear13xx_smp_ops __initconst = {
.smp_init_cpus = spear13xx_smp_init_cpus,
.smp_prepare_cpus = spear13xx_smp_prepare_cpus,
.smp_secondary_init = spear13xx_secondary_init,

3
arch/arm/mach-sti/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_STI
bool "STMicroelectronics Consumer Electronics SOCs" if ARCH_MULTI_V7
bool "STMicroelectronics Consumer Electronics SOCs"
depends on ARCH_MULTI_V7
select ARM_GIC
select ST_IRQCHIP
select ARM_GLOBAL_TIMER

2
arch/arm/mach-sti/platsmp.c
View File

@ -156,7 +156,7 @@ static void __init sti_smp_prepare_cpus(unsigned int max_cpus)
}
}
struct smp_operations __initdata sti_smp_ops = {
const struct smp_operations sti_smp_ops __initconst = {
.smp_prepare_cpus = sti_smp_prepare_cpus,
.smp_secondary_init = sti_secondary_init,
.smp_boot_secondary = sti_boot_secondary,

2
arch/arm/mach-sti/smp.h
View File

@ -12,7 +12,7 @@
#ifndef __MACH_STI_SMP_H
#define __MACH_STI_SMP_H
extern struct smp_operations sti_smp_ops;
extern const struct smp_operations sti_smp_ops;
void sti_secondary_startup(void);

3
arch/arm/mach-sunxi/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_SUNXI
bool "Allwinner SoCs" if ARCH_MULTI_V7
bool "Allwinner SoCs"
depends on ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select ARCH_HAS_RESET_CONTROLLER
select CLKSRC_MMIO

4
arch/arm/mach-sunxi/platsmp.c
View File

@ -116,7 +116,7 @@ static int sun6i_smp_boot_secondary(unsigned int cpu,
return 0;
}
static struct smp_operations sun6i_smp_ops __initdata = {
static const struct smp_operations sun6i_smp_ops __initconst = {
.smp_prepare_cpus = sun6i_smp_prepare_cpus,
.smp_boot_secondary = sun6i_smp_boot_secondary,
};
@ -185,7 +185,7 @@ static int sun8i_smp_boot_secondary(unsigned int cpu,
return 0;
}
struct smp_operations sun8i_smp_ops __initdata = {
static const struct smp_operations sun8i_smp_ops __initconst = {
.smp_prepare_cpus = sun8i_smp_prepare_cpus,
.smp_boot_secondary = sun8i_smp_boot_secondary,
};

3
arch/arm/mach-tegra/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_TEGRA
bool "NVIDIA Tegra" if ARCH_MULTI_V7
bool "NVIDIA Tegra"
depends on ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
select ARM_AMBA

2
arch/arm/mach-tegra/common.h
View File

@ -1,4 +1,4 @@
extern struct smp_operations tegra_smp_ops;
extern const struct smp_operations tegra_smp_ops;
extern int tegra_cpu_kill(unsigned int cpu);
extern void tegra_cpu_die(unsigned int cpu);

2
arch/arm/mach-tegra/platsmp.c
View File

@ -192,7 +192,7 @@ static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
scu_enable(IO_ADDRESS(scu_a9_get_base()));
}
struct smp_operations tegra_smp_ops __initdata = {
const struct smp_operations tegra_smp_ops __initconst = {
.smp_prepare_cpus = tegra_smp_prepare_cpus,
.smp_secondary_init = tegra_secondary_init,
.smp_boot_secondary = tegra_boot_secondary,

4
arch/arm/mach-u300/Kconfig
View File

@ -1,6 +1,6 @@
menuconfig ARCH_U300
bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5
depends on MMU
bool "ST-Ericsson U300 Series"
depends on ARCH_MULTI_V5 && MMU
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
select ARM_VIC

2
arch/arm/mach-uniphier/platsmp.c
View File

@ -201,7 +201,7 @@ static int __init uniphier_smp_boot_secondary(unsigned int cpu,
return 0;
}
static struct smp_operations uniphier_smp_ops __initdata = {
static const struct smp_operations uniphier_smp_ops __initconst = {
.smp_prepare_cpus = uniphier_smp_prepare_cpus,
.smp_boot_secondary = uniphier_smp_boot_secondary,
};

4
arch/arm/mach-ux500/Kconfig
View File

@ -1,6 +1,6 @@
menuconfig ARCH_U8500
bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7
depends on MMU
bool "ST-Ericsson U8500 Series"
depends on ARCH_MULTI_V7 && MMU
select AB8500_CORE
select ABX500_CORE
select ARCH_REQUIRE_GPIOLIB

2
arch/arm/mach-ux500/Makefile
View File

@ -2,7 +2,7 @@
# Makefile for the linux kernel, U8500 machine.
#
obj-y := cpu.o id.o timer.o pm.o
obj-y := cpu.o id.o pm.o
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o
obj-$(CONFIG_MACH_MOP500) += board-mop500-regulators.o \

2
arch/arm/mach-ux500/cpu-db8500.c
View File

@ -156,8 +156,6 @@ static const char * stericsson_dt_platform_compat[] = {
DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
.map_io = u8500_map_io,
.init_irq = ux500_init_irq,
/* we re-use nomadik timer here */
.init_time = ux500_timer_init,
.init_machine = u8500_init_machine,
.init_late = NULL,
.dt_compat = stericsson_dt_platform_compat,

1
arch/arm/mach-ux500/cpu.c
View File

@ -9,7 +9,6 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/clksrc-dbx500-prcmu.h>
#include <linux/sys_soc.h>
#include <linux/err.h>
#include <linux/slab.h>

2
arch/arm/mach-ux500/platsmp.c
View File

@ -98,7 +98,7 @@ static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
return 0;
}
struct smp_operations ux500_smp_ops __initdata = {
static const struct smp_operations ux500_smp_ops __initconst = {
.smp_prepare_cpus = ux500_smp_prepare_cpus,
.smp_boot_secondary = ux500_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU

3
arch/arm/mach-ux500/setup.h
View File

@ -12,7 +12,6 @@
#define __ASM_ARCH_SETUP_H
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <linux/init.h>
#include <linux/mfd/abx500/ab8500.h>
@ -24,8 +23,6 @@ extern void __init ux500_init_irq(void);
extern struct device *ux500_soc_device_init(const char *soc_id);
extern void ux500_timer_init(void);
extern void ux500_cpu_die(unsigned int cpu);
#endif /* __ASM_ARCH_SETUP_H */

48
arch/arm/mach-ux500/timer.c
View File

@ -1,48 +0,0 @@
/*
* Copyright (C) ST-Ericsson SA 2011
*
* License Terms: GNU General Public License v2
* Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
*/
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/clksrc-dbx500-prcmu.h>
#include <linux/clocksource.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include "setup.h"
#include "db8500-regs.h"
#include "id.h"
static const struct of_device_id prcmu_timer_of_match[] __initconst = {
{ .compatible = "stericsson,db8500-prcmu-timer-4", },
{ },
};
void __init ux500_timer_init(void)
{
void __iomem *prcmu_timer_base;
void __iomem *tmp_base;
struct device_node *np;
if (cpu_is_u8500_family() || cpu_is_ux540_family())
prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
else
ux500_unknown_soc();
np = of_find_matching_node(NULL, prcmu_timer_of_match);
if (!np)
goto dt_fail;
tmp_base = of_iomap(np, 0);
if (!tmp_base)
goto dt_fail;
prcmu_timer_base = tmp_base;
dt_fail:
clksrc_dbx500_prcmu_init(prcmu_timer_base);
clocksource_probe();
}

3
arch/arm/mach-vexpress/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_VEXPRESS
bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7
bool "ARM Ltd. Versatile Express family"
depends on ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select ARCH_SUPPORTS_BIG_ENDIAN
select ARM_AMBA

2
arch/arm/mach-vexpress/core.h
View File

@ -1,5 +1,5 @@
bool vexpress_smp_init_ops(void);
extern struct smp_operations vexpress_smp_dt_ops;
extern const struct smp_operations vexpress_smp_dt_ops;
extern void vexpress_cpu_die(unsigned int cpu);

2
arch/arm/mach-vexpress/platsmp.c
View File

@ -64,7 +64,7 @@ static void __init vexpress_smp_dt_prepare_cpus(unsigned int max_cpus)
vexpress_flags_set(virt_to_phys(versatile_secondary_startup));
}
struct smp_operations __initdata vexpress_smp_dt_ops = {
const struct smp_operations vexpress_smp_dt_ops __initconst = {
.smp_prepare_cpus = vexpress_smp_dt_prepare_cpus,
.smp_secondary_init = versatile_secondary_init,
.smp_boot_secondary = versatile_boot_secondary,

3
arch/arm/mach-zx/Kconfig
View File

@ -1,5 +1,6 @@
menuconfig ARCH_ZX
bool "ZTE ZX family" if ARCH_MULTI_V7
bool "ZTE ZX family"
depends on ARCH_MULTI_V7
help
Support for ZTE ZX-based family of processors. TV
set-top-box processor is supported. More will be

2
arch/arm/mach-zx/platsmp.c
View File

@ -176,7 +176,7 @@ static void zx_secondary_init(unsigned int cpu)
scu_power_mode(scu_base, SCU_PM_NORMAL);
}
struct smp_operations zx_smp_ops __initdata = {
static const struct smp_operations zx_smp_ops __initconst = {
.smp_prepare_cpus = zx_smp_prepare_cpus,
.smp_secondary_init = zx_secondary_init,
.smp_boot_secondary = zx_boot_secondary,

3
arch/arm/mach-zynq/Kconfig
View File

@ -1,5 +1,6 @@
config ARCH_ZYNQ
bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
bool "Xilinx Zynq ARM Cortex A9 Platform"
depends on ARCH_MULTI_V7
select ARCH_HAS_RESET_CONTROLLER
select ARCH_SUPPORTS_BIG_ENDIAN
select ARM_AMBA

2
arch/arm/mach-zynq/common.h
View File

@ -30,7 +30,7 @@ extern char zynq_secondary_trampoline;
extern char zynq_secondary_trampoline_jump;
extern char zynq_secondary_trampoline_end;
extern int zynq_cpun_start(u32 address, int cpu);
extern struct smp_operations zynq_smp_ops __initdata;
extern const struct smp_operations zynq_smp_ops;
#endif
extern void __iomem *zynq_scu_base;

2
arch/arm/mach-zynq/platsmp.c
View File

@ -157,7 +157,7 @@ static void zynq_cpu_die(unsigned int cpu)
}
#endif
struct smp_operations zynq_smp_ops __initdata = {
const struct smp_operations zynq_smp_ops __initconst = {
.smp_init_cpus = zynq_smp_init_cpus,
.smp_prepare_cpus = zynq_smp_prepare_cpus,
.smp_boot_secondary = zynq_boot_secondary,

9
drivers/clocksource/clksrc-dbx500-prcmu.c
View File

@ -12,8 +12,9 @@
* power domain. We use the Timer 4 for our always-on clock
* source on DB8500.
*/
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/clockchips.h>
#include <linux/clksrc-dbx500-prcmu.h>
#include <linux/sched_clock.h>
#define RATE_32K 32768
@ -63,9 +64,9 @@ static u64 notrace dbx500_prcmu_sched_clock_read(void)
#endif
void __init clksrc_dbx500_prcmu_init(void __iomem *base)
static void __init clksrc_dbx500_prcmu_init(struct device_node *node)
{
clksrc_dbx500_timer_base = base;
clksrc_dbx500_timer_base = of_iomap(node, 0);
/*
* The A9 sub system expects the timer to be configured as
@ -85,3 +86,5 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base)
#endif
clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
}
CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
clksrc_dbx500_prcmu_init);

20
include/linux/clksrc-dbx500-prcmu.h
View File

@ -1,20 +0,0 @@
/*
* Copyright (C) ST-Ericsson SA 2011
*
* License Terms: GNU General Public License v2
* Author: Mattias Wallin <mattias.wallin@stericsson.com>
*
*/
#ifndef __CLKSRC_DBX500_PRCMU_H
#define __CLKSRC_DBX500_PRCMU_H
#include <linux/init.h>
#include <linux/io.h>
#ifdef CONFIG_CLKSRC_DBX500_PRCMU
void __init clksrc_dbx500_prcmu_init(void __iomem *base);
#else
static inline void __init clksrc_dbx500_prcmu_init(void __iomem *base) {}
#endif
#endif