Merge remote branch 'alsa/devel' into topic/misc
This commit is contained in:
commit
88501ce18e
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@ -1948,7 +1948,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
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-------------------
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Module for sound cards based on the Asus AV100/AV200 chips,
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i.e., Xonar D1, DX, D2, D2X, HDAV1.3 (Deluxe), Essence ST
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i.e., Xonar D1, DX, D2, D2X, DS, HDAV1.3 (Deluxe), Essence ST
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(Deluxe) and Essence STX.
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This module supports autoprobe and multiple cards.
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@ -33,22 +33,21 @@
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#define SKEW_BASE 0x10000 /* 16bit shift */
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static void snd_seq_timer_set_tick_resolution(struct snd_seq_timer_tick *tick,
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int tempo, int ppq)
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static void snd_seq_timer_set_tick_resolution(struct snd_seq_timer *tmr)
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{
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if (tempo < 1000000)
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tick->resolution = (tempo * 1000) / ppq;
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if (tmr->tempo < 1000000)
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tmr->tick.resolution = (tmr->tempo * 1000) / tmr->ppq;
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else {
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/* might overflow.. */
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unsigned int s;
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s = tempo % ppq;
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s = (s * 1000) / ppq;
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tick->resolution = (tempo / ppq) * 1000;
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tick->resolution += s;
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s = tmr->tempo % tmr->ppq;
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s = (s * 1000) / tmr->ppq;
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tmr->tick.resolution = (tmr->tempo / tmr->ppq) * 1000;
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tmr->tick.resolution += s;
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}
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if (tick->resolution <= 0)
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tick->resolution = 1;
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snd_seq_timer_update_tick(tick, 0);
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if (tmr->tick.resolution <= 0)
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tmr->tick.resolution = 1;
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snd_seq_timer_update_tick(&tmr->tick, 0);
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}
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/* create new timer (constructor) */
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@ -96,7 +95,7 @@ void snd_seq_timer_defaults(struct snd_seq_timer * tmr)
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/* setup defaults */
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tmr->ppq = 96; /* 96 PPQ */
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tmr->tempo = 500000; /* 120 BPM */
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snd_seq_timer_set_tick_resolution(&tmr->tick, tmr->tempo, tmr->ppq);
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snd_seq_timer_set_tick_resolution(tmr);
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tmr->running = 0;
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tmr->type = SNDRV_SEQ_TIMER_ALSA;
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@ -180,7 +179,7 @@ int snd_seq_timer_set_tempo(struct snd_seq_timer * tmr, int tempo)
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spin_lock_irqsave(&tmr->lock, flags);
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if ((unsigned int)tempo != tmr->tempo) {
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tmr->tempo = tempo;
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snd_seq_timer_set_tick_resolution(&tmr->tick, tmr->tempo, tmr->ppq);
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snd_seq_timer_set_tick_resolution(tmr);
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}
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spin_unlock_irqrestore(&tmr->lock, flags);
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return 0;
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@ -205,7 +204,7 @@ int snd_seq_timer_set_ppq(struct snd_seq_timer * tmr, int ppq)
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}
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tmr->ppq = ppq;
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snd_seq_timer_set_tick_resolution(&tmr->tick, tmr->tempo, tmr->ppq);
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snd_seq_timer_set_tick_resolution(tmr);
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spin_unlock_irqrestore(&tmr->lock, flags);
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return 0;
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}
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@ -789,6 +789,7 @@ config SND_VIRTUOSO
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Say Y here to include support for sound cards based on the
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Asus AV100/AV200 chips, i.e., Xonar D1, DX, D2, D2X,
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Essence ST (Deluxe), and Essence STX.
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Support for the DS is experimental.
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Support for the HDAV1.3 (Deluxe) is very experimental.
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To compile this driver as a module, choose M here: the module
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@ -2,7 +2,7 @@ snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o
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snd-hifier-objs := hifier.o
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snd-oxygen-objs := oxygen.o
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snd-virtuoso-objs := virtuoso.o xonar_lib.o \
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xonar_pcm179x.o xonar_cs43xx.o xonar_hdmi.o
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xonar_pcm179x.o xonar_cs43xx.o xonar_wm87x6.o xonar_hdmi.o
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obj-$(CONFIG_SND_OXYGEN_LIB) += snd-oxygen-lib.o
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obj-$(CONFIG_SND_HIFIER) += snd-hifier.o
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@ -49,6 +49,7 @@ static struct pci_device_id xonar_ids[] __devinitdata = {
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{ OXYGEN_PCI_SUBID(0x1043, 0x834f) },
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{ OXYGEN_PCI_SUBID(0x1043, 0x835c) },
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{ OXYGEN_PCI_SUBID(0x1043, 0x835d) },
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{ OXYGEN_PCI_SUBID(0x1043, 0x838e) },
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{ OXYGEN_PCI_SUBID_BROKEN_EEPROM },
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{ }
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};
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@ -61,6 +62,8 @@ static int __devinit get_xonar_model(struct oxygen *chip,
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return 0;
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if (get_xonar_cs43xx_model(chip, id) >= 0)
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return 0;
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if (get_xonar_wm87x6_model(chip, id) >= 0)
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return 0;
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return -EINVAL;
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}
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@ -0,0 +1,73 @@
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#ifndef WM8766_H_INCLUDED
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#define WM8766_H_INCLUDED
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#define WM8766_LDA1 0x00
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#define WM8766_RDA1 0x01
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#define WM8766_DAC_CTRL 0x02
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#define WM8766_INT_CTRL 0x03
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#define WM8766_LDA2 0x04
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#define WM8766_RDA2 0x05
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#define WM8766_LDA3 0x06
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#define WM8766_RDA3 0x07
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#define WM8766_MASTDA 0x08
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#define WM8766_DAC_CTRL2 0x09
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#define WM8766_DAC_CTRL3 0x0a
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#define WM8766_MUTE1 0x0c
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#define WM8766_MUTE2 0x0f
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#define WM8766_RESET 0x1f
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/* LDAx/RDAx/MASTDA */
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#define WM8766_ATT_MASK 0x0ff
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#define WM8766_UPDATE 0x100
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/* DAC_CTRL */
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#define WM8766_MUTEALL 0x001
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#define WM8766_DEEMPALL 0x002
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#define WM8766_PWDN 0x004
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#define WM8766_ATC 0x008
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#define WM8766_IZD 0x010
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#define WM8766_PL_LEFT_MASK 0x060
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#define WM8766_PL_LEFT_MUTE 0x000
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#define WM8766_PL_LEFT_LEFT 0x020
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#define WM8766_PL_LEFT_RIGHT 0x040
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#define WM8766_PL_LEFT_LRMIX 0x060
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#define WM8766_PL_RIGHT_MASK 0x180
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#define WM8766_PL_RIGHT_MUTE 0x000
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#define WM8766_PL_RIGHT_LEFT 0x080
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#define WM8766_PL_RIGHT_RIGHT 0x100
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#define WM8766_PL_RIGHT_LRMIX 0x180
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/* INT_CTRL */
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#define WM8766_FMT_MASK 0x003
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#define WM8766_FMT_RJUST 0x000
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#define WM8766_FMT_LJUST 0x001
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#define WM8766_FMT_I2S 0x002
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#define WM8766_FMT_DSP 0x003
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#define WM8766_LRP 0x004
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#define WM8766_BCP 0x008
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#define WM8766_IWL_MASK 0x030
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#define WM8766_IWL_16 0x000
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#define WM8766_IWL_20 0x010
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#define WM8766_IWL_24 0x020
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#define WM8766_IWL_32 0x030
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#define WM8766_PHASE_MASK 0x1c0
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/* DAC_CTRL2 */
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#define WM8766_ZCD 0x001
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#define WM8766_DZFM_MASK 0x006
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#define WM8766_DMUTE_MASK 0x038
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#define WM8766_DEEMP_MASK 0x1c0
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/* DAC_CTRL3 */
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#define WM8766_DACPD_MASK 0x00e
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#define WM8766_PWRDNALL 0x010
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#define WM8766_MS 0x020
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#define WM8766_RATE_MASK 0x1c0
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#define WM8766_RATE_128 0x000
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#define WM8766_RATE_192 0x040
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#define WM8766_RATE_256 0x080
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#define WM8766_RATE_384 0x0c0
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#define WM8766_RATE_512 0x100
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#define WM8766_RATE_768 0x140
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/* MUTE1 */
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#define WM8766_MPD1 0x040
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/* MUTE2 */
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#define WM8766_MPD2 0x020
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#endif
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@ -0,0 +1,177 @@
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#ifndef WM8776_H_INCLUDED
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#define WM8776_H_INCLUDED
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/*
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* the following register names are from:
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* wm8776.h -- WM8776 ASoC driver
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*
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* Copyright 2009 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define WM8776_HPLVOL 0x00
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#define WM8776_HPRVOL 0x01
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#define WM8776_HPMASTER 0x02
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#define WM8776_DACLVOL 0x03
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#define WM8776_DACRVOL 0x04
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#define WM8776_DACMASTER 0x05
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#define WM8776_PHASESWAP 0x06
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#define WM8776_DACCTRL1 0x07
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#define WM8776_DACMUTE 0x08
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#define WM8776_DACCTRL2 0x09
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#define WM8776_DACIFCTRL 0x0a
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#define WM8776_ADCIFCTRL 0x0b
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#define WM8776_MSTRCTRL 0x0c
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#define WM8776_PWRDOWN 0x0d
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#define WM8776_ADCLVOL 0x0e
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#define WM8776_ADCRVOL 0x0f
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#define WM8776_ALCCTRL1 0x10
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#define WM8776_ALCCTRL2 0x11
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#define WM8776_ALCCTRL3 0x12
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#define WM8776_NOISEGATE 0x13
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#define WM8776_LIMITER 0x14
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#define WM8776_ADCMUX 0x15
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#define WM8776_OUTMUX 0x16
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#define WM8776_RESET 0x17
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/* HPLVOL/HPRVOL/HPMASTER */
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#define WM8776_HPATT_MASK 0x07f
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#define WM8776_HPZCEN 0x080
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#define WM8776_UPDATE 0x100
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/* DACLVOL/DACRVOL/DACMASTER */
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#define WM8776_DATT_MASK 0x0ff
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/*#define WM8776_UPDATE 0x100*/
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/* PHASESWAP */
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#define WM8776_PH_MASK 0x003
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/* DACCTRL1 */
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#define WM8776_DZCEN 0x001
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#define WM8776_ATC 0x002
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#define WM8776_IZD 0x004
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#define WM8776_TOD 0x008
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#define WM8776_PL_LEFT_MASK 0x030
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#define WM8776_PL_LEFT_MUTE 0x000
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#define WM8776_PL_LEFT_LEFT 0x010
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#define WM8776_PL_LEFT_RIGHT 0x020
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#define WM8776_PL_LEFT_LRMIX 0x030
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#define WM8776_PL_RIGHT_MASK 0x0c0
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#define WM8776_PL_RIGHT_MUTE 0x000
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#define WM8776_PL_RIGHT_LEFT 0x040
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#define WM8776_PL_RIGHT_RIGHT 0x080
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#define WM8776_PL_RIGHT_LRMIX 0x0c0
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/* DACMUTE */
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#define WM8776_DMUTE 0x001
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/* DACCTRL2 */
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#define WM8776_DEEMPH 0x001
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#define WM8776_DZFM_MASK 0x006
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#define WM8776_DZFM_NONE 0x000
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#define WM8776_DZFM_LR 0x002
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#define WM8776_DZFM_BOTH 0x004
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#define WM8776_DZFM_EITHER 0x006
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/* DACIFCTRL */
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#define WM8776_DACFMT_MASK 0x003
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#define WM8776_DACFMT_RJUST 0x000
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#define WM8776_DACFMT_LJUST 0x001
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#define WM8776_DACFMT_I2S 0x002
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#define WM8776_DACFMT_DSP 0x003
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#define WM8776_DACLRP 0x004
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#define WM8776_DACBCP 0x008
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#define WM8776_DACWL_MASK 0x030
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#define WM8776_DACWL_16 0x000
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#define WM8776_DACWL_20 0x010
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#define WM8776_DACWL_24 0x020
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#define WM8776_DACWL_32 0x030
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/* ADCIFCTRL */
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#define WM8776_ADCFMT_MASK 0x003
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#define WM8776_ADCFMT_RJUST 0x000
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#define WM8776_ADCFMT_LJUST 0x001
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#define WM8776_ADCFMT_I2S 0x002
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#define WM8776_ADCFMT_DSP 0x003
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#define WM8776_ADCLRP 0x004
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#define WM8776_ADCBCP 0x008
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#define WM8776_ADCWL_MASK 0x030
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#define WM8776_ADCWL_16 0x000
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#define WM8776_ADCWL_20 0x010
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#define WM8776_ADCWL_24 0x020
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#define WM8776_ADCWL_32 0x030
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#define WM8776_ADCMCLK 0x040
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#define WM8776_ADCHPD 0x100
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/* MSTRCTRL */
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#define WM8776_ADCRATE_MASK 0x007
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#define WM8776_ADCRATE_256 0x002
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#define WM8776_ADCRATE_384 0x003
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#define WM8776_ADCRATE_512 0x004
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#define WM8776_ADCRATE_768 0x005
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#define WM8776_ADCOSR 0x008
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#define WM8776_DACRATE_MASK 0x070
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#define WM8776_DACRATE_128 0x000
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#define WM8776_DACRATE_192 0x010
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#define WM8776_DACRATE_256 0x020
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#define WM8776_DACRATE_384 0x030
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#define WM8776_DACRATE_512 0x040
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#define WM8776_DACRATE_768 0x050
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#define WM8776_DACMS 0x080
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#define WM8776_ADCMS 0x100
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/* PWRDOWN */
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#define WM8776_PDWN 0x001
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#define WM8776_ADCPD 0x002
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#define WM8776_DACPD 0x004
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#define WM8776_HPPD 0x008
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#define WM8776_AINPD 0x040
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/* ADCLVOL/ADCRVOL */
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#define WM8776_AGMASK 0x0ff
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#define WM8776_ZCA 0x100
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/* ALCCTRL1 */
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#define WM8776_LCT_MASK 0x00f
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#define WM8776_MAXGAIN_MASK 0x070
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#define WM8776_LCSEL_MASK 0x180
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#define WM8776_LCSEL_LIMITER 0x000
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#define WM8776_LCSEL_ALC_RIGHT 0x080
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#define WM8776_LCSEL_ALC_LEFT 0x100
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#define WM8776_LCSEL_ALC_STEREO 0x180
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/* ALCCTRL2 */
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#define WM8776_HLD_MASK 0x00f
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#define WM8776_ALCZC 0x080
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#define WM8776_LCEN 0x100
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/* ALCCTRL3 */
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#define WM8776_ATK_MASK 0x00f
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#define WM8776_DCY_MASK 0x0f0
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/* NOISEGATE */
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#define WM8776_NGAT 0x001
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#define WM8776_NGTH_MASK 0x01c
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/* LIMITER */
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#define WM8776_MAXATTEN_MASK 0x00f
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#define WM8776_TRANWIN_MASK 0x070
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/* ADCMUX */
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#define WM8776_AMX_MASK 0x01f
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#define WM8776_MUTERA 0x040
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#define WM8776_MUTELA 0x080
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#define WM8776_LRBOTH 0x100
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/* OUTMUX */
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#define WM8776_MX_DAC 0x001
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#define WM8776_MX_AUX 0x002
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#define WM8776_MX_BYPASS 0x004
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#endif
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@ -35,6 +35,8 @@ int get_xonar_pcm179x_model(struct oxygen *chip,
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const struct pci_device_id *id);
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int get_xonar_cs43xx_model(struct oxygen *chip,
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const struct pci_device_id *id);
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int get_xonar_wm87x6_model(struct oxygen *chip,
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const struct pci_device_id *id);
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/* HDMI helper functions */
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