drm/radeon/kms: properly compute group_size on 6xx/7xx
Needed for tiled surfaces. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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354da65323
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@ -1608,8 +1608,11 @@ void r600_gpu_init(struct radeon_device *rdev)
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rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes;
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rdev->config.r600.tiling_nbanks = 4 << ((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
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tiling_config |= BANK_TILING((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
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tiling_config |= GROUP_SIZE(0);
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rdev->config.r600.tiling_group_size = 256;
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tiling_config |= GROUP_SIZE((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
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if ((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
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rdev->config.r600.tiling_group_size = 512;
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else
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rdev->config.r600.tiling_group_size = 256;
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tmp = (ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
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if (tmp > 3) {
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tiling_config |= ROW_TILING(3);
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@ -644,10 +644,11 @@ static void rv770_gpu_init(struct radeon_device *rdev)
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else
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gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
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rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3);
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gb_tiling_config |= GROUP_SIZE(0);
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rdev->config.rv770.tiling_group_size = 256;
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gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
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if ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
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rdev->config.rv770.tiling_group_size = 512;
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else
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rdev->config.rv770.tiling_group_size = 256;
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if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) {
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gb_tiling_config |= ROW_TILING(3);
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gb_tiling_config |= SAMPLE_SPLIT(3);
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