bna: Minor IRQ Index and Definition Change
Change details: - Always set mbox irq index to zero and make corresponding changes in mbox irq alloc/sync function and txrx irq index calculation. Add definition of BNAD_INTX_TX_IB_BITMASK & BNAD_INTX_RX_IB_BITMASK and update bnad_txrx_irq_alloc accordingly. Signed-off-by: Rasesh Mody <rmody@brocade.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -60,7 +60,7 @@ static const u8 bnad_bcast_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
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#define BNAD_GET_MBOX_IRQ(_bnad) \
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(((_bnad)->cfg_flags & BNAD_CF_MSIX) ? \
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((_bnad)->msix_table[(_bnad)->msix_num - 1].vector) : \
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((_bnad)->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector) : \
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((_bnad)->pcidev->irq))
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#define BNAD_FILL_UNMAPQ_MEM_REQ(_res_info, _num, _depth) \
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@ -1116,17 +1116,17 @@ bnad_mbox_irq_alloc(struct bnad *bnad,
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spin_lock_irqsave(&bnad->bna_lock, flags);
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if (bnad->cfg_flags & BNAD_CF_MSIX) {
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irq_handler = (irq_handler_t)bnad_msix_mbox_handler;
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irq = bnad->msix_table[bnad->msix_num - 1].vector;
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irq = bnad->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector;
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irq_flags = 0;
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intr_info->intr_type = BNA_INTR_T_MSIX;
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intr_info->idl[0].vector = bnad->msix_num - 1;
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intr_info->idl[0].vector = BNAD_MAILBOX_MSIX_INDEX;
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} else {
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irq_handler = (irq_handler_t)bnad_isr;
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irq = bnad->pcidev->irq;
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irq_flags = IRQF_SHARED;
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intr_info->intr_type = BNA_INTR_T_INTX;
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/* intr_info->idl.vector = 0 ? */
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}
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spin_unlock_irqrestore(&bnad->bna_lock, flags);
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sprintf(bnad->mbox_irq_name, "%s", BNAD_NAME);
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@ -1179,11 +1179,12 @@ bnad_txrx_irq_alloc(struct bnad *bnad, enum bnad_intr_source src,
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switch (src) {
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case BNAD_INTR_TX:
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vector_start = txrx_id;
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vector_start = BNAD_MAILBOX_MSIX_VECTORS + txrx_id;
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break;
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case BNAD_INTR_RX:
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vector_start = bnad->num_tx * bnad->num_txq_per_tx +
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vector_start = BNAD_MAILBOX_MSIX_VECTORS +
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(bnad->num_tx * bnad->num_txq_per_tx) +
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txrx_id;
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break;
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@ -1204,11 +1205,11 @@ bnad_txrx_irq_alloc(struct bnad *bnad, enum bnad_intr_source src,
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switch (src) {
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case BNAD_INTR_TX:
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intr_info->idl[0].vector = 0x1; /* Bit mask : Tx IB */
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intr_info->idl[0].vector = BNAD_INTX_TX_IB_BITMASK;
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break;
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case BNAD_INTR_RX:
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intr_info->idl[0].vector = 0x2; /* Bit mask : Rx IB */
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intr_info->idl[0].vector = BNAD_INTX_RX_IB_BITMASK;
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break;
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}
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}
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@ -2075,7 +2076,7 @@ bnad_mbox_irq_sync(struct bnad *bnad)
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spin_lock_irqsave(&bnad->bna_lock, flags);
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if (bnad->cfg_flags & BNAD_CF_MSIX)
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irq = bnad->msix_table[bnad->msix_num - 1].vector;
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irq = bnad->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector;
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else
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irq = bnad->pcidev->irq;
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spin_unlock_irqrestore(&bnad->bna_lock, flags);
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@ -68,7 +68,10 @@ struct bnad_rx_ctrl {
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#define BNAD_VERSION "2.3.2.3"
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#define BNAD_MAILBOX_MSIX_INDEX 0
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#define BNAD_MAILBOX_MSIX_VECTORS 1
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#define BNAD_INTX_TX_IB_BITMASK 0x1
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#define BNAD_INTX_RX_IB_BITMASK 0x2
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#define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */
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#define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */
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