drm/amdgpu/gfx8: implement emit_rreg/wreg function
Implement emit_rreg/wreg function for kiq ring. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -34,6 +34,7 @@ struct amdgpu_virt {
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uint32_t caps;
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struct amdgpu_bo *csa_obj;
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uint64_t csa_vmid0_addr;
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uint32_t reg_val_offs;
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};
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#define AMDGPU_CSA_SIZE (8 * 1024)
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@ -1373,6 +1373,12 @@ static int gfx_v8_0_kiq_init_ring(struct amdgpu_device *adev,
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{
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int r = 0;
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if (amdgpu_sriov_vf(adev)) {
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r = amdgpu_wb_get(adev, &adev->virt.reg_val_offs);
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if (r)
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return r;
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}
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ring->adev = NULL;
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ring->ring_obj = NULL;
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ring->use_doorbell = true;
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@ -1399,6 +1405,9 @@ static int gfx_v8_0_kiq_init_ring(struct amdgpu_device *adev,
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static void gfx_v8_0_kiq_free_ring(struct amdgpu_ring *ring,
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struct amdgpu_irq_src *irq)
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{
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if (amdgpu_sriov_vf(ring->adev))
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amdgpu_wb_free(ring->adev, ring->adev->virt.reg_val_offs);
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amdgpu_ring_fini(ring);
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irq->data = NULL;
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}
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@ -6720,6 +6729,32 @@ static void gfx_v8_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags)
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amdgpu_ring_write(ring, 0);
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}
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static void gfx_v8_0_ring_emit_rreg(struct amdgpu_ring *ring, uint32_t reg)
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{
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struct amdgpu_device *adev = ring->adev;
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amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));
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amdgpu_ring_write(ring, 0 | /* src: register*/
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(5 << 8) | /* dst: memory */
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(1 << 20)); /* write confirm */
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amdgpu_ring_write(ring, reg);
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amdgpu_ring_write(ring, 0);
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amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +
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adev->virt.reg_val_offs * 4));
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amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +
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adev->virt.reg_val_offs * 4));
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}
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static void gfx_v8_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg,
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uint32_t val)
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{
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amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
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amdgpu_ring_write(ring, (1 << 16)); /* no inc addr */
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amdgpu_ring_write(ring, reg);
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amdgpu_ring_write(ring, 0);
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amdgpu_ring_write(ring, val);
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}
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static void gfx_v8_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
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enum amdgpu_interrupt_state state)
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{
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@ -7035,6 +7070,8 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_kiq = {
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.test_ib = gfx_v8_0_ring_test_ib,
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.insert_nop = amdgpu_ring_insert_nop,
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.emit_rreg = gfx_v8_0_ring_emit_rreg,
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.emit_wreg = gfx_v8_0_ring_emit_wreg,
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};
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static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev)
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