[ALSA] oxygen: add more symbols
Add symbol definitions for the various codecs and GPIO pins. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
This commit is contained in:
Clemens Ladisch
Jaroslav Kysela
parent
44fb7aae82
commit
878ac3ee76
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@ -0,0 +1,63 @@
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#ifndef CM9780_H_INCLUDED
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#define CM9780_H_INCLUDED
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#define CM9780_JACK 0x62
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#define CM9780_MIXER 0x64
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#define CM9780_GPIO_SETUP 0x70
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#define CM9780_GPIO_STATUS 0x72
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/* jack control */
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#define CM9780_RSOE 0x0001
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#define CM9780_CBOE 0x0002
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#define CM9780_SSOE 0x0004
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#define CM9780_FROE 0x0008
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#define CM9780_HP2FMICOE 0x0010
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#define CM9780_CB2MICOE 0x0020
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#define CM9780_FMIC2LI 0x0040
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#define CM9780_FMIC2MIC 0x0080
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#define CM9780_HP2LI 0x0100
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#define CM9780_HP2MIC 0x0200
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#define CM9780_MIC2LI 0x0400
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#define CM9780_MIC2MIC 0x0800
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#define CM9780_LI2LI 0x1000
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#define CM9780_LI2MIC 0x2000
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#define CM9780_LO2LI 0x4000
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#define CM9780_LO2MIC 0x8000
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/* mixer control */
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#define CM9780_BSTSEL 0x0001
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#define CM9780_STRO_MIC 0x0002
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#define CM9780_SPDI_FREX 0x0004
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#define CM9780_SPDI_SSEX 0x0008
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#define CM9780_SPDI_CBEX 0x0010
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#define CM9780_SPDI_RSEX 0x0020
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#define CM9780_MIX2FR 0x0040
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#define CM9780_MIX2SS 0x0080
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#define CM9780_MIX2CB 0x0100
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#define CM9780_MIX2RS 0x0200
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#define CM9780_MIX2FR_EX 0x0400
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#define CM9780_MIX2SS_EX 0x0800
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#define CM9780_MIX2CB_EX 0x1000
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#define CM9780_MIX2RS_EX 0x2000
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#define CM9780_P47_IO 0x4000
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#define CM9780_PCBSW 0x8000
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/* GPIO setup */
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#define CM9780_GPI0EN 0x0001
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#define CM9780_GPI1EN 0x0002
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#define CM9780_SENSE_P 0x0004
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#define CM9780_LOCK_P 0x0008
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#define CM9780_GPIO0P 0x0010
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#define CM9780_GPIO1P 0x0020
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#define CM9780_GPIO0IO 0x0100
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#define CM9780_GPIO1IO 0x0200
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/* GPIO status */
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#define CM9780_GPO0 0x0001
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#define CM9780_GPO1 0x0002
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#define CM9780_GPIO0S 0x0010
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#define CM9780_GPIO1S 0x0020
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#define CM9780_GPII0S 0x0100
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#define CM9780_GPII1S 0x0200
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#endif
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@ -70,30 +70,92 @@ static struct pci_device_id oxygen_ids[] __devinitdata = {
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};
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MODULE_DEVICE_TABLE(pci, oxygen_ids);
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#define GPIO_AK5385_DFS_MASK 0x0003
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#define GPIO_AK5385_DFS_NORMAL 0x0000
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#define GPIO_AK5385_DFS_DOUBLE 0x0001
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#define GPIO_AK5385_DFS_QUAD 0x0002
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#define AK4396_WRITE 0x2000
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/* register 0 */
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#define AK4396_CONTROL_1 0
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#define AK4396_CONTROL_2 1
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#define AK4396_CONTROL_3 2
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#define AK4396_LCH_ATT 3
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#define AK4396_RCH_ATT 4
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/* control 1 */
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#define AK4396_RSTN 0x01
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#define AK4396_DIF_MASK 0x0e
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#define AK4396_DIF_16_LSB 0x00
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#define AK4396_DIF_20_LSB 0x02
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#define AK4396_DIF_24_MSB 0x04
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/* register 1 */
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#define AK4396_DIF_24_I2S 0x06
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#define AK4396_DIF_24_LSB 0x08
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#define AK4396_ACKS 0x80
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/* control 2 */
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#define AK4396_SMUTE 0x01
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#define AK4396_DEM_MASK 0x06
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#define AK4396_DEM_441 0x00
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#define AK4396_DEM_OFF 0x02
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#define AK4396_DEM_48 0x04
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#define AK4396_DEM_32 0x06
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#define AK4396_DFS_MASK 0x18
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#define AK4396_DFS_NORMAL 0x00
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#define AK4396_DFS_DOUBLE 0x08
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#define AK4396_DFS_QUAD 0x10
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#define AK4396_SLOW 0x20
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#define AK4396_DZFM 0x40
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#define AK4396_DZFE 0x80
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/* control 3 */
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#define AK4396_DZFB 0x04
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#define AK4396_DCKB 0x10
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#define AK4396_DCKS 0x20
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#define AK4396_DSDM 0x40
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#define AK4396_D_P_MASK 0x80
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#define AK4396_PCM 0x00
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#define AK4396_DSD 0x80
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/* register 0 */
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#define WM8785_R0 0
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#define WM8785_R1 1
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#define WM8785_R2 2
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#define WM8785_R7 7
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/* R0 */
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#define WM8785_MCR_MASK 0x007
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#define WM8785_MCR_SLAVE 0x000
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#define WM8785_MCR_MASTER_128 0x001
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#define WM8785_MCR_MASTER_192 0x002
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#define WM8785_MCR_MASTER_256 0x003
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#define WM8785_MCR_MASTER_384 0x004
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#define WM8785_MCR_MASTER_512 0x005
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#define WM8785_MCR_MASTER_768 0x006
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#define WM8785_OSR_MASK 0x018
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#define WM8785_OSR_SINGLE 0x000
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#define WM8785_OSR_DOUBLE 0x008
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#define WM8785_OSR_QUAD 0x010
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#define WM8785_FORMAT_MASK 0x060
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#define WM8785_FORMAT_RJUST 0x000
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#define WM8785_FORMAT_LJUST 0x020
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#define WM8785_FORMAT_I2S 0x040
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/* register 1 */
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#define WM8785_FORMAT_DSP 0x060
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/* R1 */
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#define WM8785_WL_MASK 0x003
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#define WM8785_WL_16 0x000
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#define WM8785_WL_20 0x001
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#define WM8785_WL_24 0x002
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#define WM8785_WL_32 0x003
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#define WM8785_LRP 0x004
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#define WM8785_BCLKINV 0x008
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#define WM8785_LRSWAP 0x010
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#define WM8785_DEVNO_MASK 0x0e0
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/* R2 */
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#define WM8785_HPFR 0x001
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#define WM8785_HPFL 0x002
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#define WM8785_SDODIS 0x004
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#define WM8785_PWRDNR 0x008
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#define WM8785_PWRDNL 0x010
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#define WM8785_TDM_MASK 0x1c0
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static void ak4396_write(struct oxygen *chip, unsigned int codec,
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u8 reg, u8 value)
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@ -124,29 +186,33 @@ static void ak4396_init(struct oxygen *chip)
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{
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unsigned int i;
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chip->ak4396_reg1 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
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chip->ak4396_ctl2 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
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for (i = 0; i < 4; ++i) {
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ak4396_write(chip, i, 0, AK4396_DIF_24_MSB | AK4396_RSTN);
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ak4396_write(chip, i, 1, chip->ak4396_reg1);
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ak4396_write(chip, i, 2, 0);
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ak4396_write(chip, i, 3, 0xff);
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ak4396_write(chip, i, 4, 0xff);
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ak4396_write(chip, i,
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AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
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ak4396_write(chip, i,
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AK4396_CONTROL_2, chip->ak4396_ctl2);
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ak4396_write(chip, i,
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AK4396_CONTROL_3, AK4396_PCM);
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ak4396_write(chip, i, AK4396_LCH_ATT, 0xff);
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ak4396_write(chip, i, AK4396_RCH_ATT, 0xff);
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}
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snd_component_add(chip->card, "AK4396");
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}
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static void ak5385_init(struct oxygen *chip)
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{
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, 0x0003);
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, 0x0003);
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
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snd_component_add(chip->card, "AK5385");
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}
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static void wm8785_init(struct oxygen *chip)
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{
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wm8785_write(chip, 7, 0);
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wm8785_write(chip, 0, WM8785_FORMAT_LJUST | WM8785_OSR_SINGLE);
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wm8785_write(chip, 1, WM8785_WL_24);
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wm8785_write(chip, WM8785_R7, 0);
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wm8785_write(chip, WM8785_R0, WM8785_MCR_SLAVE |
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WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST);
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wm8785_write(chip, WM8785_R1, WM8785_WL_24);
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snd_component_add(chip->card, "WM8785");
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}
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@ -184,18 +250,21 @@ static void set_ak4396_params(struct oxygen *chip,
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unsigned int i;
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u8 value;
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value = chip->ak4396_reg1 & ~AK4396_DFS_MASK;
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value = chip->ak4396_ctl2 & ~AK4396_DFS_MASK;
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if (params_rate(params) <= 54000)
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value |= AK4396_DFS_NORMAL;
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else if (params_rate(params) < 120000)
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value |= AK4396_DFS_DOUBLE;
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else
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value |= AK4396_DFS_QUAD;
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chip->ak4396_reg1 = value;
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chip->ak4396_ctl2 = value;
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for (i = 0; i < 4; ++i) {
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ak4396_write(chip, i, 0, AK4396_DIF_24_MSB);
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ak4396_write(chip, i, 1, value);
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ak4396_write(chip, i, 0, AK4396_DIF_24_MSB | AK4396_RSTN);
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ak4396_write(chip, i,
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AK4396_CONTROL_1, AK4396_DIF_24_MSB);
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ak4396_write(chip, i,
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AK4396_CONTROL_2, value);
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ak4396_write(chip, i,
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AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
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}
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}
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@ -204,8 +273,10 @@ static void update_ak4396_volume(struct oxygen *chip)
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unsigned int i;
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for (i = 0; i < 4; ++i) {
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ak4396_write(chip, i, 3, chip->dac_volume[i * 2]);
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ak4396_write(chip, i, 4, chip->dac_volume[i * 2 + 1]);
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ak4396_write(chip, i,
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AK4396_LCH_ATT, chip->dac_volume[i * 2]);
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ak4396_write(chip, i,
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AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
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}
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}
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@ -214,11 +285,11 @@ static void update_ak4396_mute(struct oxygen *chip)
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unsigned int i;
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u8 value;
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value = chip->ak4396_reg1 & ~AK4396_SMUTE;
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value = chip->ak4396_ctl2 & ~AK4396_SMUTE;
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if (chip->dac_mute)
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value |= AK4396_SMUTE;
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for (i = 0; i < 4; ++i)
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ak4396_write(chip, i, 1, value);
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ak4396_write(chip, i, AK4396_CONTROL_2, value);
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}
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static void set_wm8785_params(struct oxygen *chip,
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@ -226,22 +297,22 @@ static void set_wm8785_params(struct oxygen *chip,
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{
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unsigned int value;
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wm8785_write(chip, 7, 0);
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wm8785_write(chip, WM8785_R7, 0);
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value = WM8785_FORMAT_LJUST;
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value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
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if (params_rate(params) == 96000)
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value |= WM8785_OSR_DOUBLE;
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else if (params_rate(params) == 192000)
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value |= WM8785_OSR_QUAD;
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else
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value |= WM8785_OSR_SINGLE;
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wm8785_write(chip, 0, value);
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wm8785_write(chip, WM8785_R0, value);
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if (snd_pcm_format_width(params_format(params)) <= 16)
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value = WM8785_WL_16;
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else
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value = WM8785_WL_24;
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wm8785_write(chip, 1, value);
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wm8785_write(chip, WM8785_R1, value);
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}
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static void set_ak5385_params(struct oxygen *chip,
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@ -250,12 +321,13 @@ static void set_ak5385_params(struct oxygen *chip,
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unsigned int value;
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if (params_rate(params) <= 54000)
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value = 0;
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value = GPIO_AK5385_DFS_NORMAL;
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else if (params_rate(params) <= 108000)
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value = 1;
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value = GPIO_AK5385_DFS_DOUBLE;
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else
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value = 2;
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oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, value, 0x0003);
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value = GPIO_AK5385_DFS_QUAD;
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oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
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value, GPIO_AK5385_DFS_MASK);
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}
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static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
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@ -56,7 +56,7 @@ struct oxygen {
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u8 pcm_running;
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u8 dac_routing;
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u8 spdif_playback_enable;
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u8 ak4396_reg1;
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u8 ak4396_ctl2;
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u8 revision;
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u8 has_ac97_0;
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u8 has_ac97_1;
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@ -28,6 +28,7 @@
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#include <sound/mpu401.h>
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#include <sound/pcm.h>
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#include "oxygen.h"
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#include "cm9780.h"
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MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
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MODULE_DESCRIPTION("C-Media CMI8788 helper library");
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@ -262,9 +263,15 @@ static void __devinit oxygen_init(struct oxygen *chip)
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OXYGEN_AC97_CODEC0_LINER);
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oxygen_write_ac97(chip, 0, AC97_RESET, 0);
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msleep(1);
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oxygen_ac97_set_bits(chip, 0, 0x70, 0x0300);
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oxygen_ac97_set_bits(chip, 0, 0x64, 0x8043);
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oxygen_ac97_set_bits(chip, 0, 0x62, 0x180f);
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oxygen_ac97_set_bits(chip, 0, CM9780_GPIO_SETUP,
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CM9780_GPIO0IO | CM9780_GPIO1IO);
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oxygen_ac97_set_bits(chip, 0, CM9780_MIXER,
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CM9780_BSTSEL | CM9780_STRO_MIC |
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CM9780_MIX2FR | CM9780_PCBSW);
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oxygen_ac97_set_bits(chip, 0, CM9780_JACK,
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CM9780_RSOE | CM9780_CBOE |
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CM9780_SSOE | CM9780_FROE |
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CM9780_MIC2MIC | CM9780_LI2LI);
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oxygen_write_ac97(chip, 0, AC97_MASTER, 0x0000);
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oxygen_write_ac97(chip, 0, AC97_PC_BEEP, 0x8000);
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oxygen_write_ac97(chip, 0, AC97_MIC, 0x8808);
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@ -275,7 +282,8 @@ static void __devinit oxygen_init(struct oxygen *chip)
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oxygen_write_ac97(chip, 0, AC97_REC_GAIN, 0x8000);
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oxygen_write_ac97(chip, 0, AC97_CENTER_LFE_MASTER, 0x8080);
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oxygen_write_ac97(chip, 0, AC97_SURROUND_MASTER, 0x8080);
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oxygen_ac97_clear_bits(chip, 0, 0x72, 0x0001);
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oxygen_ac97_clear_bits(chip, 0,
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CM9780_GPIO_STATUS, CM9780_GPO0);
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/* power down unused ADCs and DACs */
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oxygen_ac97_set_bits(chip, 0, AC97_POWERDOWN,
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AC97_PD_PR0 | AC97_PD_PR1);
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@ -23,6 +23,7 @@
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#include <sound/control.h>
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#include <sound/tlv.h>
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#include "oxygen.h"
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#include "cm9780.h"
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static int dac_volume_info(struct snd_kcontrol *ctl,
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struct snd_ctl_elem_info *info)
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@ -460,8 +461,9 @@ static int ac97_switch_put(struct snd_kcontrol *ctl,
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if (change) {
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oxygen_write_ac97(chip, 0, index, newreg);
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if (index == AC97_LINE) {
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oxygen_write_ac97_masked(chip, 0, 0x72,
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!!(newreg & 0x8000), 0x0001);
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oxygen_write_ac97_masked(chip, 0, CM9780_GPIO_STATUS,
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newreg & 0x8000 ?
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CM9780_GPO0 : 0, CM9780_GPO0);
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if (!(newreg & 0x8000)) {
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ac97_mute_ctl(chip, CONTROL_MIC_CAPTURE_SWITCH);
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ac97_mute_ctl(chip, CONTROL_CD_CAPTURE_SWITCH);
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@ -471,7 +473,8 @@ static int ac97_switch_put(struct snd_kcontrol *ctl,
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index == AC97_VIDEO || index == AC97_AUX) &&
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bitnr == 15 && !(newreg & 0x8000)) {
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ac97_mute_ctl(chip, CONTROL_LINE_CAPTURE_SWITCH);
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oxygen_write_ac97_masked(chip, 0, 0x72, 0x0001, 0x0001);
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oxygen_write_ac97_masked(chip, 0, CM9780_GPIO_STATUS,
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CM9780_GPO0, CM9780_GPO0);
|
||||
}
|
||||
}
|
||||
mutex_unlock(&chip->mutex);
|
||||
|
|
|
|||
|
|
@ -18,6 +18,8 @@
|
|||
*/
|
||||
|
||||
/*
|
||||
* CMI8788:
|
||||
*
|
||||
* SPI 0 -> 1st PCM1796 (front)
|
||||
* SPI 1 -> 2nd PCM1796 (surround)
|
||||
* SPI 2 -> 3rd PCM1796 (center/LFE)
|
||||
|
|
@ -25,9 +27,13 @@
|
|||
*
|
||||
* GPIO 2 -> M0 of CS5381
|
||||
* GPIO 3 -> M1 of CS5381
|
||||
* GPIO 5 <- ? (D2X only)
|
||||
* GPIO 5 <- external power present (D2X only)
|
||||
* GPIO 7 -> ALT
|
||||
* GPIO 8 -> ? (amps enable?)
|
||||
* GPIO 8 -> enable output to speakers
|
||||
*
|
||||
* CM9780:
|
||||
*
|
||||
* GPIO 0 -> enable AC'97 bypass (line in -> ADC)
|
||||
*/
|
||||
|
||||
#include <linux/pci.h>
|
||||
|
|
@ -40,6 +46,7 @@
|
|||
#include <sound/pcm.h>
|
||||
#include <sound/tlv.h>
|
||||
#include "oxygen.h"
|
||||
#include "cm9780.h"
|
||||
|
||||
MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
|
||||
MODULE_DESCRIPTION("Asus AV200 driver");
|
||||
|
|
@ -64,14 +71,68 @@ static struct pci_device_id xonar_ids[] __devinitdata = {
|
|||
};
|
||||
MODULE_DEVICE_TABLE(pci, xonar_ids);
|
||||
|
||||
/* register 0x12 */
|
||||
|
||||
#define GPIO_CS5381_M_MASK 0x000c
|
||||
#define GPIO_CS5381_M_SINGLE 0x0000
|
||||
#define GPIO_CS5381_M_DOUBLE 0x0004
|
||||
#define GPIO_CS5381_M_QUAD 0x0008
|
||||
#define GPIO_EXT_POWER 0x0020
|
||||
#define GPIO_ALT 0x0080
|
||||
#define GPIO_OUTPUT_ENABLE 0x0100
|
||||
|
||||
/* register 16 */
|
||||
#define PCM1796_ATL_MASK 0xff
|
||||
/* register 17 */
|
||||
#define PCM1796_ATR_MASK 0xff
|
||||
/* register 18 */
|
||||
#define PCM1796_MUTE 0x01
|
||||
#define PCM1796_FMT_24_MSB 0x30
|
||||
#define PCM1796_DME 0x02
|
||||
#define PCM1796_DMF_MASK 0x0c
|
||||
#define PCM1796_DMF_DISABLED 0x00
|
||||
#define PCM1796_DMF_48 0x04
|
||||
#define PCM1796_DMF_441 0x08
|
||||
#define PCM1796_DMF_32 0x0c
|
||||
#define PCM1796_FMT_MASK 0x70
|
||||
#define PCM1796_FMT_16_RJUST 0x00
|
||||
#define PCM1796_FMT_20_RJUST 0x10
|
||||
#define PCM1796_FMT_24_RJUST 0x20
|
||||
#define PCM1796_FMT_24_LJUST 0x30
|
||||
#define PCM1796_FMT_16_I2S 0x40
|
||||
#define PCM1796_FMT_24_I2S 0x50
|
||||
#define PCM1796_ATLD 0x80
|
||||
/* register 0x14 */
|
||||
/* register 19 */
|
||||
#define PCM1796_INZD 0x01
|
||||
#define PCM1796_FLT_MASK 0x02
|
||||
#define PCM1796_FLT_SHARP 0x00
|
||||
#define PCM1796_FLT_SLOW 0x02
|
||||
#define PCM1796_DFMS 0x04
|
||||
#define PCM1796_OPE 0x10
|
||||
#define PCM1796_ATS_MASK 0x60
|
||||
#define PCM1796_ATS_1 0x00
|
||||
#define PCM1796_ATS_2 0x20
|
||||
#define PCM1796_ATS_4 0x40
|
||||
#define PCM1796_ATS_8 0x60
|
||||
#define PCM1796_REV 0x80
|
||||
/* register 20 */
|
||||
#define PCM1796_OS_MASK 0x03
|
||||
#define PCM1796_OS_64 0x00
|
||||
#define PCM1796_OS_32 0x01
|
||||
#define PCM1796_OS_128 0x02
|
||||
#define PCM1796_CHSL_MASK 0x04
|
||||
#define PCM1796_CHSL_LEFT 0x00
|
||||
#define PCM1796_CHSL_RIGHT 0x04
|
||||
#define PCM1796_MONO 0x08
|
||||
#define PCM1796_DFTH 0x10
|
||||
#define PCM1796_DSD 0x20
|
||||
#define PCM1796_SRST 0x40
|
||||
/* register 21 */
|
||||
#define PCM1796_PCMZ 0x01
|
||||
#define PCM1796_DZ_MASK 0x06
|
||||
/* register 22 */
|
||||
#define PCM1796_ZFGL 0x01
|
||||
#define PCM1796_ZFGR 0x02
|
||||
/* register 23 */
|
||||
#define PCM1796_ID_MASK 0x1f
|
||||
|
||||
static void pcm1796_write(struct oxygen *chip, unsigned int codec,
|
||||
u8 reg, u8 value)
|
||||
|
|
@ -93,20 +154,23 @@ static void xonar_init(struct oxygen *chip)
|
|||
unsigned int i;
|
||||
|
||||
for (i = 0; i < 4; ++i) {
|
||||
pcm1796_write(chip, i, 0x12, PCM1796_FMT_24_MSB | PCM1796_ATLD);
|
||||
pcm1796_write(chip, i, 0x13, 0);
|
||||
pcm1796_write(chip, i, 0x14, PCM1796_OS_64);
|
||||
pcm1796_write(chip, i, 0x15, 0);
|
||||
pcm1796_write(chip, i, 0x10, 0xff);
|
||||
pcm1796_write(chip, i, 0x11, 0xff);
|
||||
pcm1796_write(chip, i, 18, PCM1796_FMT_24_LJUST | PCM1796_ATLD);
|
||||
pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1);
|
||||
pcm1796_write(chip, i, 20, PCM1796_OS_64);
|
||||
pcm1796_write(chip, i, 21, 0);
|
||||
pcm1796_write(chip, i, 16, 0xff); /* set ATL/ATR after ATLD */
|
||||
pcm1796_write(chip, i, 17, 0xff);
|
||||
}
|
||||
|
||||
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, 0x8c);
|
||||
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 0x00, 0x8c);
|
||||
oxygen_ac97_set_bits(chip, 0, 0x62, 0x0080);
|
||||
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
|
||||
GPIO_CS5381_M_MASK | GPIO_ALT);
|
||||
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
|
||||
GPIO_CS5381_M_SINGLE,
|
||||
GPIO_CS5381_M_MASK | GPIO_ALT);
|
||||
oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC);
|
||||
msleep(300);
|
||||
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, 0x100);
|
||||
oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, 0x100);
|
||||
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_OUTPUT_ENABLE);
|
||||
oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE);
|
||||
|
||||
snd_component_add(chip->card, "PCM1796");
|
||||
snd_component_add(chip->card, "CS5381");
|
||||
|
|
@ -114,7 +178,7 @@ static void xonar_init(struct oxygen *chip)
|
|||
|
||||
static void xonar_cleanup(struct oxygen *chip)
|
||||
{
|
||||
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, 0x100);
|
||||
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE);
|
||||
}
|
||||
|
||||
static void set_pcm1796_params(struct oxygen *chip,
|
||||
|
|
@ -126,7 +190,7 @@ static void set_pcm1796_params(struct oxygen *chip,
|
|||
|
||||
value = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64;
|
||||
for (i = 0; i < 4; ++i)
|
||||
pcm1796_write(chip, i, 0x14, value);
|
||||
pcm1796_write(chip, i, 20, value);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -135,8 +199,8 @@ static void update_pcm1796_volume(struct oxygen *chip)
|
|||
unsigned int i;
|
||||
|
||||
for (i = 0; i < 4; ++i) {
|
||||
pcm1796_write(chip, i, 0x10, chip->dac_volume[i * 2]);
|
||||
pcm1796_write(chip, i, 0x11, chip->dac_volume[i * 2 + 1]);
|
||||
pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]);
|
||||
pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -145,11 +209,11 @@ static void update_pcm1796_mute(struct oxygen *chip)
|
|||
unsigned int i;
|
||||
u8 value;
|
||||
|
||||
value = PCM1796_FMT_24_MSB | PCM1796_ATLD;
|
||||
value = PCM1796_FMT_24_LJUST | PCM1796_ATLD;
|
||||
if (chip->dac_mute)
|
||||
value |= PCM1796_MUTE;
|
||||
for (i = 0; i < 4; ++i)
|
||||
pcm1796_write(chip, i, 0x12, value);
|
||||
pcm1796_write(chip, i, 18, value);
|
||||
}
|
||||
|
||||
static void set_cs5381_params(struct oxygen *chip,
|
||||
|
|
@ -158,12 +222,13 @@ static void set_cs5381_params(struct oxygen *chip,
|
|||
unsigned int value;
|
||||
|
||||
if (params_rate(params) <= 54000)
|
||||
value = 0;
|
||||
value = GPIO_CS5381_M_SINGLE;
|
||||
else if (params_rate(params) <= 108000)
|
||||
value = 4;
|
||||
value = GPIO_CS5381_M_DOUBLE;
|
||||
else
|
||||
value = 8;
|
||||
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, value, 0x000c);
|
||||
value = GPIO_CS5381_M_QUAD;
|
||||
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
|
||||
value, GPIO_CS5381_M_MASK);
|
||||
}
|
||||
|
||||
static int pcm1796_volume_info(struct snd_kcontrol *ctl,
|
||||
|
|
@ -182,7 +247,7 @@ static int alt_switch_get(struct snd_kcontrol *ctl,
|
|||
struct oxygen *chip = ctl->private_data;
|
||||
|
||||
value->value.integer.value[0] =
|
||||
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & 0x80);
|
||||
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_ALT);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -196,9 +261,9 @@ static int alt_switch_put(struct snd_kcontrol *ctl,
|
|||
spin_lock_irq(&chip->reg_lock);
|
||||
old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA);
|
||||
if (value->value.integer.value[0])
|
||||
new_bits = old_bits | 0x80;
|
||||
new_bits = old_bits | GPIO_ALT;
|
||||
else
|
||||
new_bits = old_bits & ~0x80;
|
||||
new_bits = old_bits & ~GPIO_ALT;
|
||||
changed = new_bits != old_bits;
|
||||
if (changed)
|
||||
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits);
|
||||
|
|
|
|||
Loading…
Reference in New Issue