ARM: ux500: convert timer suspend/resume to clock_event_device
Move ux500's timer suspend/resume functions from struct sys_timer ux500_timer into struct clock_event_device nmdk_clkevt. This will allow the sys_timer suspend/resume fields to be removed, and eventually lead to a complete removal of struct sys_timer. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -100,13 +100,6 @@ dt_fail:
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ux500_twd_init();
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ux500_twd_init();
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}
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}
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static void ux500_timer_reset(void)
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{
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nmdk_clkevt_reset();
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nmdk_clksrc_reset();
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}
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struct sys_timer ux500_timer = {
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struct sys_timer ux500_timer = {
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.init = ux500_timer_init,
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.init = ux500_timer_init,
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.resume = ux500_timer_reset,
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};
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};
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@ -134,12 +134,32 @@ static void nmdk_clkevt_mode(enum clock_event_mode mode,
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}
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}
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}
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}
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void nmdk_clksrc_reset(void)
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{
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/* Disable */
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writel(0, mtu_base + MTU_CR(0));
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/* ClockSource: configure load and background-load, and fire it up */
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writel(nmdk_cycle, mtu_base + MTU_LR(0));
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writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
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writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
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mtu_base + MTU_CR(0));
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}
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static void nmdk_clkevt_resume(struct clock_event_device *cedev)
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{
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nmdk_clkevt_reset();
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nmdk_clksrc_reset();
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}
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static struct clock_event_device nmdk_clkevt = {
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static struct clock_event_device nmdk_clkevt = {
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.name = "mtu_1",
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.name = "mtu_1",
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.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
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.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
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.rating = 200,
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.rating = 200,
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.set_mode = nmdk_clkevt_mode,
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.set_mode = nmdk_clkevt_mode,
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.set_next_event = nmdk_clkevt_next,
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.set_next_event = nmdk_clkevt_next,
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.resume = nmdk_clkevt_resume,
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};
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};
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/*
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/*
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@ -161,19 +181,6 @@ static struct irqaction nmdk_timer_irq = {
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.dev_id = &nmdk_clkevt,
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.dev_id = &nmdk_clkevt,
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};
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};
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void nmdk_clksrc_reset(void)
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{
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/* Disable */
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writel(0, mtu_base + MTU_CR(0));
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/* ClockSource: configure load and background-load, and fire it up */
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writel(nmdk_cycle, mtu_base + MTU_LR(0));
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writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
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writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
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mtu_base + MTU_CR(0));
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}
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void __init nmdk_timer_init(void __iomem *base, int irq)
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void __init nmdk_timer_init(void __iomem *base, int irq)
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{
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{
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unsigned long rate;
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unsigned long rate;
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