hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

MIPS: Oprofile: Loongson: Unify macro for setting events 

Unified macro for counter0 and counter1 to set the event in the control
register.  This will be needed by Perf.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1200/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Wu Zhangjin 2010-05-07 01:29:44 +08:00 committed by Ralf Baechle
parent 0103d23f44
commit 86e5a52021
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/mips/oprofile/op_model_loongson2.c
View File

@ -24,8 +24,8 @@
*/
#define LOONGSON2_CPU_TYPE "mips/loongson2"
#define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5)
#define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9)
#define LOONGSON2_PERFCTRL_EVENT(idx, event) \
(((event) & 0x0f) << ((idx) ? 9 : 5))
#define LOONGSON2_PERFCNT_EXL (1UL << 0)
#define LOONGSON2_PERFCNT_KERNEL (1UL << 1)
@ -60,12 +60,12 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
/* Compute the performance counter ctrl word. */
/* For now count kernel and user mode */
if (cfg[0].enabled) {
ctrl |= LOONGSON2_COUNTER1_EVENT(cfg[0].event);
ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event);
reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
}
if (cfg[1].enabled) {
ctrl |= LOONGSON2_COUNTER2_EVENT(cfg[1].event);
ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event);
reg.reset_counter2 = (0x80000000ULL - cfg[1].count);
}