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[POWERPC] mpic: add support for serial mode interrupts 

On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> > MPC10x-style interrupt controllers have a serial mode that allows
> > several interrupts to be clocked in through one INT signal.
> >
> > This patch adds the software support for that mode.
>
> You hard code the clock ratio... why not add a separate call to be
> called after mpic_init,
> something like mpic_set_serial_int(int mpic, int enable, int
> clock_ratio) ?

How's this?
--

MPC10x-style interrupt controllers have a serial mode that allows
several interrupts to be clocked in through one INT signal.

This patch adds the software support for that mode.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--

 arch/powerpc/sysdev/mpic.c |   20 ++++++++++++++++++++
 include/asm-powerpc/mpic.h |   10 ++++++++++
 2 files changed, 30 insertions(+)
--
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Mark A. Greer 2006-06-20 14:15:36 -07:00 committed by Paul Mackerras
parent 0aa8d15b01
commit 868ea0c925
2 changed files with 30 additions and 0 deletions
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20
arch/powerpc/sysdev/mpic.c
View File

@ -829,7 +829,27 @@ void __init mpic_init(struct mpic *mpic)
mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0);
}
void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
{
u32 v;
v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
v &= ~MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK;
v |= MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(clock_ratio);
mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
}
void __init mpic_set_serial_int(struct mpic *mpic, int enable)
{
u32 v;
v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
if (enable)
v |= MPIC_GREG_GLOBAL_CONF_1_SIE;
else
v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE;
mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
}
void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
{

10
include/asm-powerpc/mpic.h
View File

@ -22,6 +22,10 @@
#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000
#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
#define MPIC_GREG_GLOBAL_CONF_1 0x00030
#define MPIC_GREG_GLOBAL_CONF_1_SIE 0x08000000
#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK 0x70000000
#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r) \
(((r) << 28) & MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK)
#define MPIC_GREG_VENDOR_0 0x00040
#define MPIC_GREG_VENDOR_1 0x00050
#define MPIC_GREG_VENDOR_2 0x00060
@ -284,6 +288,12 @@ extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs);
/* This one gets to the primary mpic */
extern int mpic_get_irq(struct pt_regs *regs);
/* Set the EPIC clock ratio */
void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);
/* Enable/Disable EPIC serial interrupt mode */
void mpic_set_serial_int(struct mpic *mpic, int enable);
/* global mpic for pSeries */
extern struct mpic *pSeries_mpic;