Renesas Clocksource Updates for v3.18

* Document per-SoC bindings
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUDmfmAAoJENfPZGlqN0++78gP/0Pb7FxcZWqfICjZ9cNYGaLv
 2jPgM/0jsyEuMlR6Wcosl2OLszRzyK3TGek7QrDWsoSGaVX7Z2w0NAr9CeaBWxjD
 wj7hAKrAZIv2J7Ia/c55Mld0xTskJ9uQCQSLkTM6k0vDZm0r7B7qZOwvt9jfz8TS
 s/jX3X4qJGpHokzeU1t5wAYP7vjgkCSIeybRpHyCw9fvJFDW/EUMZlJ3yzZDtZlf
 cK0SdpyARSuHDXeA7NHgEkXZ0G5mwvA6gMiE5lsjifCSurlHDj/wX4G0UmncUeIC
 3wMjMPNcGHUYtl8xVANB/qqpHH7K5FgHEIJmZyCm+I3nkxpPNhyVzqRdThqOynru
 Gk7VOhhCIDXQukEr4dKKsouiiL8K5dnR8MzOfxgxJhZaLyZeHbwrzL82Pc1QZo1f
 m+MxWaTaCRZo2eKr4GeFBe5jr+DzTFLCUIBfo8s8iD3LXpZsKUp/lEk/gvcKpFPB
 xuNy0dvNJV2YvmhrgOrbVUYAj6CJOuMVckvdq7HshoebUGXp1aeva/i6DHTrmPe7
 Gx2zyTN823yUyiKpsXNmw3CdLJq2ObOaHef7kAcSHNJ67pny0B3QxwY2XUd3cZWu
 rJBijVYnZyPODD+HnyiRlGlHd4QAbWMMUNxcAmTl+sG2Elzan3sFt3qINl+WJjoR
 NJswxr0Hy8TaySUHsvZf
 =uqoV
 -----END PGP SIGNATURE-----

Merge tag 'renesas-clocksource-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into clockevents/3.18

Renesas Clocksource Updates for v3.18

* Document per-SoC bindings

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

Documentation/devicetree/bindings/timer/renesas,cmt.txt

@@ -11,15 +11,47 @@ datasheets.
 
 Required Properties:
 
-  - compatible: must contain one of the following.
+  - compatible: must contain one or more of the following:
-    - "renesas,cmt-32" for the 32-bit CMT
+    - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT
+		(CMT0)
+    - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT
+		(CMT0)
+    - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT
+		(CMT0)
+    - "renesas,cmt-32" for all 32-bit CMT without fast clock support
 		(CMT0 on sh7372, sh73a0 and r8a7740)
-    - "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support
+		This is a fallback for the above renesas,cmt-32-* entries.
+
+    - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast
+		clock support (CMT[234])
+    - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast
+		clock support (CMT[234])
+    - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast
+		clock support (CMT[234])
+    - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support
 		(CMT[234] on sh7372, sh73a0 and r8a7740)
-    - "renesas,cmt-48" for the 48-bit CMT
+		This is a fallback for the above renesas,cmt-32-fast-* entries.
+
+    - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT
+		(CMT1)
+    - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
+		(CMT1)
+    - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
+		(CMT1)
+    - "renesas,cmt-48" for all non-second generation 48-bit CMT
 		(CMT1 on sh7372, sh73a0 and r8a7740)
-    - "renesas,cmt-48-gen2" for the second generation 48-bit CMT
+		This is a fallback for the above renesas,cmt-48-* entries.
+
+    - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT
+		(CMT[01])
+    - "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT
+		(CMT[01])
+    - "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT
+		(CMT[01])
+    - "renesas,cmt-48-gen2" for all second generation 48-bit CMT
 		(CMT[01] on r8a73a4, r8a7790 and r8a7791)
+		This is a fallback for the renesas,cmt-48-r8a73a4,
+		renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.
 
   - reg: base address and length of the registers block for the timer module.
   - interrupts: interrupt-specifier for the timer, one per channel.
@@ -36,7 +68,7 @@ Example: R8A7790 (R-Car H2) CMT0 node
 	them channels 0 and 1 in the documentation.
 
 	cmt0: timer@ffca0000 {
-		compatible = "renesas,cmt-48-gen2";
+		compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
 		reg = <0 0xffca0000 0 0x1004>;
 		interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 142 IRQ_TYPE_LEVEL_HIGH>;

Documentation/devicetree/bindings/timer/renesas,mtu2.txt

@@ -8,7 +8,10 @@ are independent. The MTU2 hardware supports five channels indexed from 0 to 4.
 
 Required Properties:
 
-  - compatible: must contain "renesas,mtu2"
+  - compatible: must be one or more of the following:
+    - "renesas,mtu2-r7s72100" for the r7s72100 MTU2
+    - "renesas,mtu2" for any MTU2
+      This is a fallback for the above renesas,mtu2-* entries
 
   - reg: base address and length of the registers block for the timer module.
 
@@ -26,7 +29,7 @@ Required Properties:
 Example: R7S72100 (RZ/A1H) MTU2 node
 
 	mtu2: timer@fcff0000 {
-		compatible = "renesas,mtu2";
+		compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
 		reg = <0xfcff0000 0x400>;
 		interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 146 IRQ_TYPE_LEVEL_HIGH>,

Documentation/devicetree/bindings/timer/renesas,tmu.txt

@@ -8,7 +8,10 @@ are independent. The TMU hardware supports up to three channels.
 
 Required Properties:
 
-  - compatible: must contain "renesas,tmu"
+  - compatible: must contain one or more of the following:
+    - "renesas,tmu-r8a7779" for the r8a7779 TMU
+    - "renesas,tmu" for any TMU.
+      This is a fallback for the above renesas,tmu-* entries
 
   - reg: base address and length of the registers block for the timer module.
 
@@ -27,7 +30,7 @@ Optional Properties:
 Example: R8A7779 (R-Car H1) TMU0 node
 
 	tmu0: timer@ffd80000 {
-		compatible = "renesas,tmu";
+		compatible = "renesas,tmu-r8a7779", "renesas,tmu";
 		reg = <0xffd80000 0x30>;
 		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 33 IRQ_TYPE_LEVEL_HIGH>,