dt-bindings: mmc: convert synopsys dw-mshc bindings to yaml
Current dts files with 'dwmmc' nodes are manually verified. In order to automate this process synopsys-dw-mshc.txt has to be converted to yaml. In the new setup synopsys-dw-mshc.yaml will inherit properties from mmc-controller.yaml and synopsys-dw-mshc-common.yaml. 'dwmmc' will no longer be a valid name for a node and should be changed to 'mmc'. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200116152230.29831-1-jbx6244@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Johan Jonker
Ulf Hansson
parent
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys Designware Mobile Storage Host Controller Common Properties
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allOf:
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- $ref: "mmc-controller.yaml#"
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maintainers:
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- Ulf Hansson <ulf.hansson@linaro.org>
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# Everything else is described in the common file
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properties:
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resets:
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maxItems: 1
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reset-names:
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const: reset
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clock-frequency:
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description:
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Should be the frequency (in Hz) of the ciu clock. If this
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is specified and the ciu clock is specified then we'll try to set the ciu
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clock to this at probe time.
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fifo-depth:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32
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description:
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The maximum size of the tx/rx fifo's. If this property is not
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specified, the default value of the fifo size is determined from the
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controller registers.
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card-detect-delay:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32
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- default: 0
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description:
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Delay in milli-seconds before detecting card after card
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insert event. The default value is 0.
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data-addr:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32
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description:
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Override fifo address with value provided by DT. The default FIFO reg
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offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A)
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by driver. If the controller does not follow this rule, please use
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this property to set fifo address in device tree.
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fifo-watermark-aligned:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/flag
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description:
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Data done irq is expected if data length is less than
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watermark in PIO mode. But fifo watermark is requested to be aligned
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with data length in some SoC so that TX/RX irq can be generated with
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data done irq. Add this watermark quirk to mark this requirement and
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force fifo watermark setting accordingly.
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dmas:
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maxItems: 1
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dma-names:
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const: rx-tx
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@ -1,141 +0,0 @@
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* Synopsys Designware Mobile Storage Host Controller
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The Synopsys designware mobile storage host controller is used to interface
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a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
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differences between the core mmc properties described by mmc.txt and the
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properties used by the Synopsys Designware Mobile Storage Host Controller.
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Required Properties:
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* compatible: should be
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- snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
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* #address-cells: should be 1.
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* #size-cells: should be 0.
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# Slots (DEPRECATED): The slot specific information are contained within
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child-nodes with each child-node representing a supported slot. There should
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be atleast one child node representing a card slot. The name of the child node
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representing the slot is recommended to be slot@n where n is the unique number
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of the slot connected to the controller. The following are optional properties
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which can be included in the slot child node.
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* reg: specifies the physical slot number. The valid values of this
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property is 0 to (num-slots -1), where num-slots is the value
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specified by the num-slots property.
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* bus-width: as documented in mmc core bindings.
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* wp-gpios: specifies the write protect gpio line. The format of the
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gpio specifier depends on the gpio controller. If a GPIO is not used
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for write-protect, this property is optional.
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* disable-wp: If the wp-gpios property isn't present then (by default)
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we'd assume that the write protect is hooked up directly to the
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controller's special purpose write protect line (accessible via
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the WRTPRT register). However, it's possible that we simply don't
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want write protect. In that case specify 'disable-wp'.
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NOTE: This property is not required for slots known to always
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connect to eMMC or SDIO cards.
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Optional properties:
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* resets: phandle + reset specifier pair, intended to represent hardware
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reset signal present internally in some host controller IC designs.
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See Documentation/devicetree/bindings/reset/reset.txt for details.
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* reset-names: request name for using "resets" property. Must be "reset".
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(It will be used together with "resets" property.)
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* clocks: from common clock binding: handle to biu and ciu clocks for the
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bus interface unit clock and the card interface unit clock.
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* clock-names: from common clock binding: Shall be "biu" and "ciu".
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If the biu clock is missing we'll simply skip enabling it. If the
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ciu clock is missing we'll just assume that the clock is running at
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clock-frequency. It is an error to omit both the ciu clock and the
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clock-frequency.
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* clock-frequency: should be the frequency (in Hz) of the ciu clock. If this
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is specified and the ciu clock is specified then we'll try to set the ciu
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clock to this at probe time.
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* fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
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specified, the default value of the fifo size is determined from the
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controller registers.
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* card-detect-delay: Delay in milli-seconds before detecting card after card
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insert event. The default value is 0.
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* data-addr: Override fifo address with value provided by DT. The default FIFO reg
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offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A) by
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driver. If the controller does not follow this rule, please use this property
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to set fifo address in device tree.
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* fifo-watermark-aligned: Data done irq is expected if data length is less than
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watermark in PIO mode. But fifo watermark is requested to be aligned with data
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length in some SoC so that TX/RX irq can be generated with data done irq. Add this
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watermark quirk to mark this requirement and force fifo watermark setting
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accordingly.
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* vmmc-supply: The phandle to the regulator to use for vmmc. If this is
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specified we'll defer probe until we can find this regulator.
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* dmas: List of DMA specifiers with the controller specific format as described
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in the generic DMA client binding. Refer to dma.txt for details.
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* dma-names: request names for generic DMA client binding. Must be "rx-tx".
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Refer to dma.txt for details.
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Aliases:
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- All the MSHC controller nodes should be represented in the aliases node using
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the following format 'mshc{n}' where n is a unique number for the alias.
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Example:
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The MSHC controller node can be split into two portions, SoC specific and
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board specific portions as listed below.
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dwmmc0@12200000 {
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compatible = "snps,dw-mshc";
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clocks = <&clock 351>, <&clock 132>;
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clock-names = "biu", "ciu";
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reg = <0x12200000 0x1000>;
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interrupts = <0 75 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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data-addr = <0x200>;
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fifo-watermark-aligned;
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resets = <&rst 20>;
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reset-names = "reset";
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};
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[board specific internal DMA resources]
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dwmmc0@12200000 {
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clock-frequency = <400000000>;
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clock-freq-min-max = <400000 200000000>;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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vmmc-supply = <&buck8>;
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bus-width = <8>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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};
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[board specific generic DMA request binding]
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dwmmc0@12200000 {
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clock-frequency = <400000000>;
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clock-freq-min-max = <400000 200000000>;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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vmmc-supply = <&buck8>;
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bus-width = <8>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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dmas = <&pdma 12>;
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dma-names = "rx-tx";
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};
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@ -0,0 +1,70 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys Designware Mobile Storage Host Controller Binding
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allOf:
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- $ref: "synopsys-dw-mshc-common.yaml#"
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maintainers:
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- Ulf Hansson <ulf.hansson@linaro.org>
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# Everything else is described in the common file
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properties:
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compatible:
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const: snps,dw-mshc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 2
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maxItems: 2
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description:
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Handle to "biu" and "ciu" clocks for the
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bus interface unit clock and the card interface unit clock.
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clock-names:
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items:
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- const: biu
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- const: ciu
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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examples:
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- |
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mmc@12200000 {
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compatible = "snps,dw-mshc";
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reg = <0x12200000 0x1000>;
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interrupts = <0 75 0>;
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clocks = <&clock 351>, <&clock 132>;
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clock-names = "biu", "ciu";
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dmas = <&pdma 12>;
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dma-names = "rx-tx";
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resets = <&rst 20>;
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reset-names = "reset";
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vmmc-supply = <&buck8>;
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#address-cells = <1>;
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#size-cells = <0>;
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broken-cd;
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bus-width = <8>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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clock-freq-min-max = <400000 200000000>;
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clock-frequency = <400000000>;
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data-addr = <0x200>;
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fifo-depth = <0x80>;
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fifo-watermark-aligned;
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};
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