metag: Boot
Add boot code for metag. Due to the multi-threaded nature of Meta it is not uncommon for an RTOS or bare metal application to be started on other hardware threads by the bootloader. Since there is a single MMU switch which affects all threads, the MMU is traditionally configured by the bootloader prior to starting Linux. The bootloader passes a structure to Linux which among other things contains information about memory regions which have been mapped. Linux then assumes control of the local heap memory region. A kernel arguments string pointer or a flattened device tree pointer can be provided in the third argument. Signed-off-by: James Hogan <james.hogan@imgtec.com>
This commit is contained in:
James Hogan
parent
87aa1328f2
commit
85d9d7a920
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@ -0,0 +1,4 @@
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vmlinux*
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uImage*
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ramdisk.*
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*.dtb
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@ -0,0 +1,82 @@
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/*
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* arch/metag/include/asm/mach/arch.h
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*
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* Copyright (C) 2012 Imagination Technologies Ltd.
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*
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* based on the ARM version:
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* Copyright (C) 2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _METAG_MACH_ARCH_H_
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#define _METAG_MACH_ARCH_H_
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#include <linux/stddef.h>
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/**
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* struct machine_desc - Describes a board controlled by a Meta.
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* @name: Board/SoC name.
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* @dt_compat: Array of device tree 'compatible' strings.
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*
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* @nr_irqs: Maximum number of IRQs.
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* If 0, defaults to NR_IRQS in asm-generic/irq.h.
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*
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* @init_early: Early init callback.
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* @init_irq: IRQ init callback for setting up IRQ controllers.
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* @init_machine: Arch init callback for setting up devices.
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* @init_late: Late init callback.
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*
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* This structure is provided by each board which can be controlled by a Meta.
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* It is chosen by matching the compatible strings in the device tree provided
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* by the bootloader with the strings in @dt_compat, and sets up any aspects of
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* the machine that aren't configured with device tree (yet).
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*/
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struct machine_desc {
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const char *name;
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const char **dt_compat;
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unsigned int nr_irqs;
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void (*init_early)(void);
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void (*init_irq)(void);
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void (*init_machine)(void);
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void (*init_late)(void);
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};
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/*
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* Current machine - only accessible during boot.
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*/
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extern struct machine_desc *machine_desc;
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/*
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* Machine type table - also only accessible during boot
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*/
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extern struct machine_desc __arch_info_begin[], __arch_info_end[];
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#define for_each_machine_desc(p) \
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for (p = __arch_info_begin; p < __arch_info_end; p++)
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static inline struct machine_desc *default_machine_desc(void)
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{
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/* the default machine is the last one linked in */
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if (__arch_info_end - 1 < __arch_info_begin)
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return NULL;
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return __arch_info_end - 1;
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}
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/*
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* Set of macros to define architecture features. This is built into
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* a table by the linker.
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*/
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#define MACHINE_START(_type, _name) \
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static const struct machine_desc __mach_desc_##_type \
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__used \
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__attribute__((__section__(".arch.info.init"))) = { \
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.name = _name,
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#define MACHINE_END \
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};
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#endif /* _METAG_MACH_ARCH_H_ */
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@ -0,0 +1,8 @@
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#ifndef _ASM_METAG_SETUP_H
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#define _ASM_METAG_SETUP_H
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#include <uapi/asm/setup.h>
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void per_cpu_trap_init(unsigned long);
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extern void __init dump_machine_table(void);
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#endif /* _ASM_METAG_SETUP_H */
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@ -0,0 +1,45 @@
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! Copyright 2005,2006,2007,2009 Imagination Technologies
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#include <linux/init.h>
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#include <generated/asm-offsets.h>
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#undef __exit
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__HEAD
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! Setup the stack and get going into _metag_start_kernel
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.global __start
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.type __start,function
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__start:
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! D1Ar1 contains pTBI (ISTAT)
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! D0Ar2 contains pTBI
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! D1Ar3 contains __pTBISegs
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! D0Ar4 contains kernel arglist pointer
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MOVT D0Re0,#HI(___pTBIs)
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ADD D0Re0,D0Re0,#LO(___pTBIs)
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SETL [D0Re0],D0Ar2,D1Ar1
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MOVT D0Re0,#HI(___pTBISegs)
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ADD D0Re0,D0Re0,#LO(___pTBISegs)
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SETD [D0Re0],D1Ar3
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MOV A0FrP,#0
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MOV D0Re0,#0
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MOV D1Re0,#0
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MOV D1Ar3,#0
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MOV D1Ar1,D0Ar4 !Store kernel boot params
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MOV D1Ar5,#0
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MOV D0Ar6,#0
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#ifdef CONFIG_METAG_DSP
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MOV D0.8,#0
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#endif
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MOVT A0StP,#HI(_init_thread_union)
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ADD A0StP,A0StP,#LO(_init_thread_union)
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ADD A0StP,A0StP,#THREAD_INFO_SIZE
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MOVT D1RtP,#HI(_metag_start_kernel)
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CALL D1RtP,#LO(_metag_start_kernel)
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.size __start,.-__start
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!! Needed by TBX
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.global __exit
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.type __exit,function
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__exit:
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XOR TXENABLE,D0Re0,D0Re0
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.size __exit,.-__exit
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/*
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* arch/metag/kernel/machines.c
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*
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* Copyright (C) 2012 Imagination Technologies Ltd.
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*
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* Generic Meta Boards.
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*/
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#include <linux/init.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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static const char *meta_boards_compat[] __initdata = {
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"img,meta",
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NULL,
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};
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MACHINE_START(META, "Generic Meta")
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.dt_compat = meta_boards_compat,
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MACHINE_END
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@ -0,0 +1,556 @@
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/*
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* Copyright (C) 2005-2012 Imagination Technologies Ltd.
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*
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* This file contains the architecture-dependant parts of system setup.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/fs.h>
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#include <linux/console.h>
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#include <linux/genhd.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <linux/root_dev.h>
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#include <linux/initrd.h>
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#include <linux/seq_file.h>
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#include <linux/pfn.h>
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#include <linux/start_kernel.h>
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#include <linux/cpu.h>
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#include <linux/memblock.h>
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#include <linux/of_fdt.h>
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#include <asm/cachepart.h>
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#include <asm/clock.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/processor.h>
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#include <asm/traps.h>
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#include <asm/mmu.h>
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#include <asm/cpu.h>
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#include <asm/hwthread.h>
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#include <asm/mmzone.h>
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#include <asm/l2cache.h>
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#include <asm/prom.h>
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#include <asm/mach/arch.h>
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#include <asm/core_reg.h>
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#include <asm/highmem.h>
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/* PRIV protect as many registers as possible. */
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#define DEFAULT_PRIV 0xff0f7f00
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/* Enable unaligned access checking. */
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#define UNALIGNED_PRIV 0x00000010
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#ifdef CONFIG_METAG_UNALIGNED
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#define PRIV_BITS (DEFAULT_PRIV | UNALIGNED_PRIV)
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#else
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#define PRIV_BITS DEFAULT_PRIV
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#endif
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extern char _heap_start[];
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#ifdef CONFIG_METAG_BUILTIN_DTB
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extern u32 __dtb_start[];
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#endif
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struct machine_desc *machine_desc __initdata;
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/*
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* Map a Linux CPU number to a hardware thread ID
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* In SMP this will be setup with the correct mapping at startup; in UP this
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* will map to the HW thread on which we are running.
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*/
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u8 cpu_2_hwthread_id[NR_CPUS] __read_mostly = {
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[0 ... NR_CPUS-1] = BAD_HWTHREAD_ID
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};
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/*
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* Map a hardware thread ID to a Linux CPU number
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* In SMP this will be fleshed out with the correct CPU ID for a particular
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* hardware thread. In UP this will be initialised with the boot CPU ID.
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*/
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u8 hwthread_id_2_cpu[4] __read_mostly = {
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[0 ... 3] = BAD_CPU_ID
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};
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/* The relative offset of the MMU mapped memory (from ldlk or bootloader)
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* to the real physical memory. This is needed as we have to use the
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* physical addresses in the MMU tables (pte entries), and not the virtual
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* addresses.
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* This variable is used in the __pa() and __va() macros, and should
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* probably only be used via them.
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*/
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unsigned int meta_memoffset;
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static char __initdata *original_cmd_line;
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DEFINE_PER_CPU(PTBI, pTBI);
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/*
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* Mapping are specified as "CPU_ID:HWTHREAD_ID", e.g.
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*
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* "hwthread_map=0:1,1:2,2:3,3:0"
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*
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* Linux CPU ID HWTHREAD_ID
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* ---------------------------
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* 0 1
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* 1 2
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* 2 3
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* 3 0
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*/
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static int __init parse_hwthread_map(char *p)
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{
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int cpu;
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while (*p) {
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cpu = (*p++) - '0';
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if (cpu < 0 || cpu > 9)
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goto err_cpu;
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p++; /* skip semi-colon */
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cpu_2_hwthread_id[cpu] = (*p++) - '0';
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if (cpu_2_hwthread_id[cpu] >= 4)
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goto err_thread;
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hwthread_id_2_cpu[cpu_2_hwthread_id[cpu]] = cpu;
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if (*p == ',')
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p++; /* skip comma */
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}
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return 0;
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err_cpu:
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pr_err("%s: hwthread_map cpu argument out of range\n", __func__);
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return -EINVAL;
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err_thread:
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pr_err("%s: hwthread_map thread argument out of range\n", __func__);
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return -EINVAL;
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}
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early_param("hwthread_map", parse_hwthread_map);
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void __init dump_machine_table(void)
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{
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struct machine_desc *p;
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const char **compat;
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pr_info("Available machine support:\n\tNAME\t\tCOMPATIBLE LIST\n");
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for_each_machine_desc(p) {
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pr_info("\t%s\t[", p->name);
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for (compat = p->dt_compat; compat && *compat; ++compat)
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printk(" '%s'", *compat);
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printk(" ]\n");
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}
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pr_info("\nPlease check your kernel config and/or bootloader.\n");
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hard_processor_halt(HALT_PANIC);
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}
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#ifdef CONFIG_METAG_HALT_ON_PANIC
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static int metag_panic_event(struct notifier_block *this, unsigned long event,
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void *ptr)
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{
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hard_processor_halt(HALT_PANIC);
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return NOTIFY_DONE;
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}
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static struct notifier_block metag_panic_block = {
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metag_panic_event,
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NULL,
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0
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};
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#endif
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void __init setup_arch(char **cmdline_p)
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{
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unsigned long start_pfn;
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unsigned long text_start = (unsigned long)(&_stext);
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unsigned long cpu = smp_processor_id();
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unsigned long heap_start, heap_end;
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unsigned long start_pte;
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PTBI _pTBI;
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PTBISEG p_heap;
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int heap_id, i;
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|
|
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metag_cache_probe();
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|
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/* try interpreting the argument as a device tree */
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machine_desc = setup_machine_fdt(original_cmd_line);
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/* if it doesn't look like a device tree it must be a command line */
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if (!machine_desc) {
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#ifdef CONFIG_METAG_BUILTIN_DTB
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/* try the embedded device tree */
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machine_desc = setup_machine_fdt(__dtb_start);
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if (!machine_desc)
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panic("Invalid embedded device tree.");
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#else
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/* use the default machine description */
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machine_desc = default_machine_desc();
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|
#endif
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#ifndef CONFIG_CMDLINE_FORCE
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/* append the bootloader cmdline to any builtin fdt cmdline */
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if (boot_command_line[0] && original_cmd_line[0])
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strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
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strlcat(boot_command_line, original_cmd_line,
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COMMAND_LINE_SIZE);
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#endif
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}
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setup_meta_clocks(machine_desc->clocks);
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|
|
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*cmdline_p = boot_command_line;
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parse_early_param();
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|
|
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/*
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* Make sure we don't alias in dcache or icache
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||||||
|
*/
|
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check_for_cache_aliasing(cpu);
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|
|
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|
|
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#ifdef CONFIG_METAG_HALT_ON_PANIC
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atomic_notifier_chain_register(&panic_notifier_list,
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&metag_panic_block);
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#endif
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|
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#endif
|
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|
|
||||||
|
if (!(__core_reg_get(TXSTATUS) & TXSTATUS_PSTAT_BIT))
|
||||||
|
panic("Privilege must be enabled for this thread.");
|
||||||
|
|
||||||
|
_pTBI = __TBI(TBID_ISTAT_BIT);
|
||||||
|
|
||||||
|
per_cpu(pTBI, cpu) = _pTBI;
|
||||||
|
|
||||||
|
if (!per_cpu(pTBI, cpu))
|
||||||
|
panic("No TBI found!");
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Initialize all interrupt vectors to our copy of __TBIUnExpXXX,
|
||||||
|
* rather than the version from the bootloader. This makes call
|
||||||
|
* stacks easier to understand and may allow us to unmap the
|
||||||
|
* bootloader at some point.
|
||||||
|
*
|
||||||
|
* We need to keep the LWK handler that TBI installed in order to
|
||||||
|
* be able to do inter-thread comms.
|
||||||
|
*/
|
||||||
|
for (i = 0; i <= TBID_SIGNUM_MAX; i++)
|
||||||
|
if (i != TBID_SIGNUM_LWK)
|
||||||
|
_pTBI->fnSigs[i] = __TBIUnExpXXX;
|
||||||
|
|
||||||
|
/* A Meta requirement is that the kernel is loaded (virtually)
|
||||||
|
* at the PAGE_OFFSET.
|
||||||
|
*/
|
||||||
|
if (PAGE_OFFSET != text_start)
|
||||||
|
panic("Kernel not loaded at PAGE_OFFSET (%#x) but at %#lx.",
|
||||||
|
PAGE_OFFSET, text_start);
|
||||||
|
|
||||||
|
start_pte = mmu_read_second_level_page(text_start);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Kernel pages should have the PRIV bit set by the bootloader.
|
||||||
|
*/
|
||||||
|
if (!(start_pte & _PAGE_KERNEL))
|
||||||
|
panic("kernel pte does not have PRIV set");
|
||||||
|
|
||||||
|
/*
|
||||||
|
* See __pa and __va in include/asm/page.h.
|
||||||
|
* This value is negative when running in local space but the
|
||||||
|
* calculations work anyway.
|
||||||
|
*/
|
||||||
|
meta_memoffset = text_start - (start_pte & PAGE_MASK);
|
||||||
|
|
||||||
|
/* Now lets look at the heap space */
|
||||||
|
heap_id = (__TBIThreadId() & TBID_THREAD_BITS)
|
||||||
|
+ TBID_SEG(0, TBID_SEGSCOPE_LOCAL, TBID_SEGTYPE_HEAP);
|
||||||
|
|
||||||
|
p_heap = __TBIFindSeg(NULL, heap_id);
|
||||||
|
|
||||||
|
if (!p_heap)
|
||||||
|
panic("Could not find heap from TBI!");
|
||||||
|
|
||||||
|
/* The heap begins at the first full page after the kernel data. */
|
||||||
|
heap_start = (unsigned long) &_heap_start;
|
||||||
|
|
||||||
|
/* The heap ends at the end of the heap segment specified with
|
||||||
|
* ldlk.
|
||||||
|
*/
|
||||||
|
if (is_global_space(text_start)) {
|
||||||
|
pr_debug("WARNING: running in global space!\n");
|
||||||
|
heap_end = (unsigned long)p_heap->pGAddr + p_heap->Bytes;
|
||||||
|
} else {
|
||||||
|
heap_end = (unsigned long)p_heap->pLAddr + p_heap->Bytes;
|
||||||
|
}
|
||||||
|
|
||||||
|
ROOT_DEV = Root_RAM0;
|
||||||
|
|
||||||
|
/* init_mm is the mm struct used for the first task. It is then
|
||||||
|
* cloned for all other tasks spawned from that task.
|
||||||
|
*
|
||||||
|
* Note - we are using the virtual addresses here.
|
||||||
|
*/
|
||||||
|
init_mm.start_code = (unsigned long)(&_stext);
|
||||||
|
init_mm.end_code = (unsigned long)(&_etext);
|
||||||
|
init_mm.end_data = (unsigned long)(&_edata);
|
||||||
|
init_mm.brk = (unsigned long)heap_start;
|
||||||
|
|
||||||
|
min_low_pfn = PFN_UP(__pa(text_start));
|
||||||
|
max_low_pfn = PFN_DOWN(__pa(heap_end));
|
||||||
|
|
||||||
|
pfn_base = min_low_pfn;
|
||||||
|
|
||||||
|
/* Round max_pfn up to a 4Mb boundary. The free_bootmem_node()
|
||||||
|
* call later makes sure to keep the rounded up pages marked reserved.
|
||||||
|
*/
|
||||||
|
max_pfn = max_low_pfn + ((1 << MAX_ORDER) - 1);
|
||||||
|
max_pfn &= ~((1 << MAX_ORDER) - 1);
|
||||||
|
|
||||||
|
start_pfn = PFN_UP(__pa(heap_start));
|
||||||
|
|
||||||
|
if (min_low_pfn & ((1 << MAX_ORDER) - 1)) {
|
||||||
|
/* Theoretically, we could expand the space that the
|
||||||
|
* bootmem allocator covers - much as we do for the
|
||||||
|
* 'high' address, and then tell the bootmem system
|
||||||
|
* that the lowest chunk is 'not available'. Right
|
||||||
|
* now it is just much easier to constrain the
|
||||||
|
* user to always MAX_ORDER align their kernel space.
|
||||||
|
*/
|
||||||
|
|
||||||
|
panic("Kernel must be %d byte aligned, currently at %#lx.",
|
||||||
|
1 << (MAX_ORDER + PAGE_SHIFT),
|
||||||
|
min_low_pfn << PAGE_SHIFT);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_HIGHMEM
|
||||||
|
highstart_pfn = highend_pfn = max_pfn;
|
||||||
|
high_memory = (void *) __va(PFN_PHYS(highstart_pfn));
|
||||||
|
#else
|
||||||
|
high_memory = (void *)__va(PFN_PHYS(max_pfn));
|
||||||
|
#endif
|
||||||
|
|
||||||
|
paging_init(heap_end);
|
||||||
|
|
||||||
|
setup_txprivext();
|
||||||
|
|
||||||
|
/* Setup the boot cpu's mapping. The rest will be setup below. */
|
||||||
|
cpu_2_hwthread_id[smp_processor_id()] = hard_processor_id();
|
||||||
|
hwthread_id_2_cpu[hard_processor_id()] = smp_processor_id();
|
||||||
|
|
||||||
|
unflatten_device_tree();
|
||||||
|
|
||||||
|
#ifdef CONFIG_SMP
|
||||||
|
smp_init_cpus();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if (machine_desc->init_early)
|
||||||
|
machine_desc->init_early();
|
||||||
|
}
|
||||||
|
|
||||||
|
static int __init customize_machine(void)
|
||||||
|
{
|
||||||
|
/* customizes platform devices, or adds new ones */
|
||||||
|
if (machine_desc->init_machine)
|
||||||
|
machine_desc->init_machine();
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
arch_initcall(customize_machine);
|
||||||
|
|
||||||
|
static int __init init_machine_late(void)
|
||||||
|
{
|
||||||
|
if (machine_desc->init_late)
|
||||||
|
machine_desc->init_late();
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
late_initcall(init_machine_late);
|
||||||
|
|
||||||
|
#ifdef CONFIG_PROC_FS
|
||||||
|
/*
|
||||||
|
* Get CPU information for use by the procfs.
|
||||||
|
*/
|
||||||
|
static const char *get_cpu_capabilities(unsigned int txenable)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_METAG_META21
|
||||||
|
/* See CORE_ID in META HTP.GP TRM - Architecture Overview 2.1.238 */
|
||||||
|
int coreid = metag_in32(METAC_CORE_ID);
|
||||||
|
unsigned int dsp_type = (coreid >> 3) & 7;
|
||||||
|
unsigned int fpu_type = (coreid >> 7) & 3;
|
||||||
|
|
||||||
|
switch (dsp_type | fpu_type << 3) {
|
||||||
|
case (0x00): return "EDSP";
|
||||||
|
case (0x01): return "DSP";
|
||||||
|
case (0x08): return "EDSP+LFPU";
|
||||||
|
case (0x09): return "DSP+LFPU";
|
||||||
|
case (0x10): return "EDSP+FPU";
|
||||||
|
case (0x11): return "DSP+FPU";
|
||||||
|
}
|
||||||
|
return "UNKNOWN";
|
||||||
|
|
||||||
|
#else
|
||||||
|
if (!(txenable & TXENABLE_CLASS_BITS))
|
||||||
|
return "DSP";
|
||||||
|
else
|
||||||
|
return "";
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
static int show_cpuinfo(struct seq_file *m, void *v)
|
||||||
|
{
|
||||||
|
const char *cpu;
|
||||||
|
unsigned int txenable, thread_id, major, minor;
|
||||||
|
unsigned long clockfreq = get_coreclock();
|
||||||
|
#ifdef CONFIG_SMP
|
||||||
|
int i;
|
||||||
|
unsigned long lpj;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
cpu = "META";
|
||||||
|
|
||||||
|
txenable = __core_reg_get(TXENABLE);
|
||||||
|
major = (txenable & TXENABLE_MAJOR_REV_BITS) >> TXENABLE_MAJOR_REV_S;
|
||||||
|
minor = (txenable & TXENABLE_MINOR_REV_BITS) >> TXENABLE_MINOR_REV_S;
|
||||||
|
thread_id = (txenable >> 8) & 0x3;
|
||||||
|
|
||||||
|
#ifdef CONFIG_SMP
|
||||||
|
for_each_online_cpu(i) {
|
||||||
|
lpj = per_cpu(cpu_data, i).loops_per_jiffy;
|
||||||
|
txenable = core_reg_read(TXUCT_ID, TXENABLE_REGNUM,
|
||||||
|
cpu_2_hwthread_id[i]);
|
||||||
|
|
||||||
|
seq_printf(m, "CPU:\t\t%s %d.%d (thread %d)\n"
|
||||||
|
"Clocking:\t%lu.%1luMHz\n"
|
||||||
|
"BogoMips:\t%lu.%02lu\n"
|
||||||
|
"Calibration:\t%lu loops\n"
|
||||||
|
"Capabilities:\t%s\n\n",
|
||||||
|
cpu, major, minor, i,
|
||||||
|
clockfreq / 1000000, (clockfreq / 100000) % 10,
|
||||||
|
lpj / (500000 / HZ), (lpj / (5000 / HZ)) % 100,
|
||||||
|
lpj,
|
||||||
|
get_cpu_capabilities(txenable));
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
seq_printf(m, "CPU:\t\t%s %d.%d (thread %d)\n"
|
||||||
|
"Clocking:\t%lu.%1luMHz\n"
|
||||||
|
"BogoMips:\t%lu.%02lu\n"
|
||||||
|
"Calibration:\t%lu loops\n"
|
||||||
|
"Capabilities:\t%s\n",
|
||||||
|
cpu, major, minor, thread_id,
|
||||||
|
clockfreq / 1000000, (clockfreq / 100000) % 10,
|
||||||
|
loops_per_jiffy / (500000 / HZ),
|
||||||
|
(loops_per_jiffy / (5000 / HZ)) % 100,
|
||||||
|
loops_per_jiffy,
|
||||||
|
get_cpu_capabilities(txenable));
|
||||||
|
#endif /* CONFIG_SMP */
|
||||||
|
|
||||||
|
#ifdef CONFIG_METAG_L2C
|
||||||
|
if (meta_l2c_is_present()) {
|
||||||
|
seq_printf(m, "L2 cache:\t%s\n"
|
||||||
|
"L2 cache size:\t%d KB\n",
|
||||||
|
meta_l2c_is_enabled() ? "enabled" : "disabled",
|
||||||
|
meta_l2c_size() >> 10);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void *c_start(struct seq_file *m, loff_t *pos)
|
||||||
|
{
|
||||||
|
return (void *)(*pos == 0);
|
||||||
|
}
|
||||||
|
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
|
||||||
|
{
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
static void c_stop(struct seq_file *m, void *v)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
const struct seq_operations cpuinfo_op = {
|
||||||
|
.start = c_start,
|
||||||
|
.next = c_next,
|
||||||
|
.stop = c_stop,
|
||||||
|
.show = show_cpuinfo,
|
||||||
|
};
|
||||||
|
#endif /* CONFIG_PROC_FS */
|
||||||
|
|
||||||
|
void __init metag_start_kernel(char *args)
|
||||||
|
{
|
||||||
|
/* Zero the timer register so timestamps are from the point at
|
||||||
|
* which the kernel started running.
|
||||||
|
*/
|
||||||
|
__core_reg_set(TXTIMER, 0);
|
||||||
|
|
||||||
|
/* Clear the bss. */
|
||||||
|
memset(__bss_start, 0,
|
||||||
|
(unsigned long)__bss_stop - (unsigned long)__bss_start);
|
||||||
|
|
||||||
|
/* Remember where these are for use in setup_arch */
|
||||||
|
original_cmd_line = args;
|
||||||
|
|
||||||
|
current_thread_info()->cpu = hard_processor_id();
|
||||||
|
|
||||||
|
start_kernel();
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Setup TXPRIVEXT register to be prevent userland from touching our
|
||||||
|
* precious registers.
|
||||||
|
*/
|
||||||
|
void setup_txprivext(void)
|
||||||
|
{
|
||||||
|
__core_reg_set(TXPRIVEXT, PRIV_BITS);
|
||||||
|
}
|
||||||
|
|
||||||
|
PTBI pTBI_get(unsigned int cpu)
|
||||||
|
{
|
||||||
|
return per_cpu(pTBI, cpu);
|
||||||
|
}
|
||||||
|
|
||||||
|
#if defined(CONFIG_METAG_DSP) && defined(CONFIG_METAG_FPU)
|
||||||
|
char capabilites[] = "dsp fpu";
|
||||||
|
#elif defined(CONFIG_METAG_DSP)
|
||||||
|
char capabilites[] = "dsp";
|
||||||
|
#elif defined(CONFIG_METAG_FPU)
|
||||||
|
char capabilites[] = "fpu";
|
||||||
|
#else
|
||||||
|
char capabilites[] = "";
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static struct ctl_table caps_kern_table[] = {
|
||||||
|
{
|
||||||
|
.procname = "capabilities",
|
||||||
|
.data = capabilites,
|
||||||
|
.maxlen = sizeof(capabilites),
|
||||||
|
.mode = 0444,
|
||||||
|
.proc_handler = proc_dostring,
|
||||||
|
},
|
||||||
|
{}
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct ctl_table caps_root_table[] = {
|
||||||
|
{
|
||||||
|
.procname = "kernel",
|
||||||
|
.mode = 0555,
|
||||||
|
.child = caps_kern_table,
|
||||||
|
},
|
||||||
|
{}
|
||||||
|
};
|
||||||
|
|
||||||
|
static int __init capabilities_register_sysctl(void)
|
||||||
|
{
|
||||||
|
struct ctl_table_header *caps_table_header;
|
||||||
|
|
||||||
|
caps_table_header = register_sysctl_table(caps_root_table);
|
||||||
|
if (!caps_table_header) {
|
||||||
|
pr_err("Unable to register CAPABILITIES sysctl\n");
|
||||||
|
return -ENOMEM;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
core_initcall(capabilities_register_sysctl);
|
||||||
Loading…
Reference in New Issue