mmc: sdhci: Improve register dump print format
Ensure all prints start with the mmc host name, and the text all lines up. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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@ -40,6 +40,9 @@
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#define DBG(f, x...) \
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pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
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#define SDHCI_DUMP(f, x...) \
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pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
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#define MAX_TUNING_LOOP 40
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static unsigned int debug_quirks = 0;
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@ -51,65 +54,64 @@ static void sdhci_enable_preset_value(struct sdhci_host *host, bool enable);
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static void sdhci_dumpregs(struct sdhci_host *host)
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{
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pr_err(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
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mmc_hostname(host->mmc));
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SDHCI_DUMP("============ SDHCI REGISTER DUMP ===========\n");
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pr_err(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
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sdhci_readl(host, SDHCI_DMA_ADDRESS),
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sdhci_readw(host, SDHCI_HOST_VERSION));
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pr_err(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
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sdhci_readw(host, SDHCI_BLOCK_SIZE),
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sdhci_readw(host, SDHCI_BLOCK_COUNT));
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pr_err(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
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sdhci_readl(host, SDHCI_ARGUMENT),
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sdhci_readw(host, SDHCI_TRANSFER_MODE));
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pr_err(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
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sdhci_readl(host, SDHCI_PRESENT_STATE),
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sdhci_readb(host, SDHCI_HOST_CONTROL));
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pr_err(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
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sdhci_readb(host, SDHCI_POWER_CONTROL),
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sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
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pr_err(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
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sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
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sdhci_readw(host, SDHCI_CLOCK_CONTROL));
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pr_err(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
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sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
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sdhci_readl(host, SDHCI_INT_STATUS));
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pr_err(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
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sdhci_readl(host, SDHCI_INT_ENABLE),
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sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
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pr_err(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
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sdhci_readw(host, SDHCI_ACMD12_ERR),
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sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
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pr_err(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n",
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sdhci_readl(host, SDHCI_CAPABILITIES),
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sdhci_readl(host, SDHCI_CAPABILITIES_1));
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pr_err(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n",
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sdhci_readw(host, SDHCI_COMMAND),
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sdhci_readl(host, SDHCI_MAX_CURRENT));
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pr_err(DRIVER_NAME ": Resp[0]: 0x%08x | Resp[1]: 0x%08x\n",
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SDHCI_DUMP("Sys addr: 0x%08x | Version: 0x%08x\n",
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sdhci_readl(host, SDHCI_DMA_ADDRESS),
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sdhci_readw(host, SDHCI_HOST_VERSION));
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SDHCI_DUMP("Blk size: 0x%08x | Blk cnt: 0x%08x\n",
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sdhci_readw(host, SDHCI_BLOCK_SIZE),
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sdhci_readw(host, SDHCI_BLOCK_COUNT));
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SDHCI_DUMP("Argument: 0x%08x | Trn mode: 0x%08x\n",
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sdhci_readl(host, SDHCI_ARGUMENT),
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sdhci_readw(host, SDHCI_TRANSFER_MODE));
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SDHCI_DUMP("Present: 0x%08x | Host ctl: 0x%08x\n",
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sdhci_readl(host, SDHCI_PRESENT_STATE),
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sdhci_readb(host, SDHCI_HOST_CONTROL));
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SDHCI_DUMP("Power: 0x%08x | Blk gap: 0x%08x\n",
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sdhci_readb(host, SDHCI_POWER_CONTROL),
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sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
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SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n",
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sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
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sdhci_readw(host, SDHCI_CLOCK_CONTROL));
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SDHCI_DUMP("Timeout: 0x%08x | Int stat: 0x%08x\n",
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sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
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sdhci_readl(host, SDHCI_INT_STATUS));
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SDHCI_DUMP("Int enab: 0x%08x | Sig enab: 0x%08x\n",
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sdhci_readl(host, SDHCI_INT_ENABLE),
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sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
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SDHCI_DUMP("AC12 err: 0x%08x | Slot int: 0x%08x\n",
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sdhci_readw(host, SDHCI_ACMD12_ERR),
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sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
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SDHCI_DUMP("Caps: 0x%08x | Caps_1: 0x%08x\n",
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sdhci_readl(host, SDHCI_CAPABILITIES),
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sdhci_readl(host, SDHCI_CAPABILITIES_1));
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SDHCI_DUMP("Cmd: 0x%08x | Max curr: 0x%08x\n",
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sdhci_readw(host, SDHCI_COMMAND),
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sdhci_readl(host, SDHCI_MAX_CURRENT));
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SDHCI_DUMP("Resp[0]: 0x%08x | Resp[1]: 0x%08x\n",
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sdhci_readl(host, SDHCI_RESPONSE),
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sdhci_readl(host, SDHCI_RESPONSE + 4));
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pr_err(DRIVER_NAME ": Resp[2]: 0x%08x | Resp[3]: 0x%08x\n",
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SDHCI_DUMP("Resp[2]: 0x%08x | Resp[3]: 0x%08x\n",
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sdhci_readl(host, SDHCI_RESPONSE + 8),
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sdhci_readl(host, SDHCI_RESPONSE + 12));
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pr_err(DRIVER_NAME ": Host ctl2: 0x%08x\n",
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sdhci_readw(host, SDHCI_HOST_CONTROL2));
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SDHCI_DUMP("Host ctl2: 0x%08x\n",
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sdhci_readw(host, SDHCI_HOST_CONTROL2));
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if (host->flags & SDHCI_USE_ADMA) {
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if (host->flags & SDHCI_USE_64_BIT_DMA)
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pr_err(DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x%08x\n",
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sdhci_readl(host, SDHCI_ADMA_ERROR),
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sdhci_readl(host, SDHCI_ADMA_ADDRESS_HI),
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sdhci_readl(host, SDHCI_ADMA_ADDRESS));
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else
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pr_err(DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n",
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sdhci_readl(host, SDHCI_ADMA_ERROR),
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sdhci_readl(host, SDHCI_ADMA_ADDRESS));
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if (host->flags & SDHCI_USE_64_BIT_DMA) {
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SDHCI_DUMP("ADMA Err: 0x%08x | ADMA Ptr: 0x%08x%08x\n",
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sdhci_readl(host, SDHCI_ADMA_ERROR),
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sdhci_readl(host, SDHCI_ADMA_ADDRESS_HI),
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sdhci_readl(host, SDHCI_ADMA_ADDRESS));
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} else {
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SDHCI_DUMP("ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n",
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sdhci_readl(host, SDHCI_ADMA_ERROR),
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sdhci_readl(host, SDHCI_ADMA_ADDRESS));
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}
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}
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pr_err(DRIVER_NAME ": ===========================================\n");
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SDHCI_DUMP("============================================\n");
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}
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/*****************************************************************************\
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