sdhci: support JMicron JMB38x chips
The JMicron JMB38x chip doesn't support transfers that aren't 32-bit aligned (both size and start address). It also doesn't like switching between PIO and DMA mode, so it needs to be reset after each request. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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@ -7,6 +7,10 @@
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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* your option) any later version.
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*
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* Thanks to the following companies for their support:
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*
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* - JMicron (hardware and technical support)
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*/
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*/
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#include <linux/delay.h>
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#include <linux/delay.h>
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@ -47,6 +51,8 @@ static unsigned int debug_quirks = 0;
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#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<6)
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#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<6)
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/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
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/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
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#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7)
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#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7)
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/* Controller needs to be reset after each request to stay stable */
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#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<8)
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static const struct pci_device_id pci_ids[] __devinitdata = {
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static const struct pci_device_id pci_ids[] __devinitdata = {
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{
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{
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@ -111,6 +117,16 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
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SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS,
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SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS,
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},
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},
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{
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.vendor = PCI_VENDOR_ID_JMICRON,
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.device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = SDHCI_QUIRK_32BIT_DMA_ADDR |
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SDHCI_QUIRK_32BIT_DMA_SIZE |
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SDHCI_QUIRK_RESET_AFTER_REQUEST,
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},
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{ /* Generic SD host controller */
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{ /* Generic SD host controller */
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PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
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PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
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},
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},
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@ -922,7 +938,8 @@ static void sdhci_tasklet_finish(unsigned long param)
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*/
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*/
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if (mrq->cmd->error ||
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if (mrq->cmd->error ||
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(mrq->data && (mrq->data->error ||
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(mrq->data && (mrq->data->error ||
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(mrq->data->stop && mrq->data->stop->error)))) {
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(mrq->data->stop && mrq->data->stop->error))) ||
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(host->chip->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) {
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/* Some controllers need this kick or reset won't work here */
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/* Some controllers need this kick or reset won't work here */
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if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
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if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
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@ -2148,6 +2148,7 @@
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#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365
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#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365
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#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366
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#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366
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#define PCI_DEVICE_ID_JMICRON_JMB368 0x2368
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#define PCI_DEVICE_ID_JMICRON_JMB368 0x2368
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#define PCI_DEVICE_ID_JMICRON_JMB38X_SD 0x2381
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#define PCI_VENDOR_ID_KORENIX 0x1982
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#define PCI_VENDOR_ID_KORENIX 0x1982
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#define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600
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#define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600
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