KVM: VMX: Atomically switch efer if EPT && !EFER.NX
When EPT is enabled, we cannot emulate EFER.NX=0 through the shadow page tables. This causes accesses through ptes with bit 63 set to succeed instead of failing a reserved bit check. Signed-off-by: Avi Kivity <avi@redhat.com>
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@ -678,6 +678,17 @@ static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset)
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guest_efer |= host_efer & ignore_bits;
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guest_efer |= host_efer & ignore_bits;
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vmx->guest_msrs[efer_offset].data = guest_efer;
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vmx->guest_msrs[efer_offset].data = guest_efer;
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vmx->guest_msrs[efer_offset].mask = ~ignore_bits;
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vmx->guest_msrs[efer_offset].mask = ~ignore_bits;
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clear_atomic_switch_msr(vmx, MSR_EFER);
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/* On ept, can't emulate nx, and must switch nx atomically */
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if (enable_ept && ((vmx->vcpu.arch.efer ^ host_efer) & EFER_NX)) {
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guest_efer = vmx->vcpu.arch.efer;
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if (!(guest_efer & EFER_LMA))
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guest_efer &= ~EFER_LME;
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add_atomic_switch_msr(vmx, MSR_EFER, guest_efer, host_efer);
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return false;
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}
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return true;
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return true;
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}
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}
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@ -1734,6 +1745,7 @@ static void exit_lmode(struct kvm_vcpu *vcpu)
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vmcs_write32(VM_ENTRY_CONTROLS,
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vmcs_write32(VM_ENTRY_CONTROLS,
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vmcs_read32(VM_ENTRY_CONTROLS)
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vmcs_read32(VM_ENTRY_CONTROLS)
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& ~VM_ENTRY_IA32E_MODE);
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& ~VM_ENTRY_IA32E_MODE);
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vmx_set_efer(vcpu, vcpu->arch.efer);
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}
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}
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#endif
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#endif
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