Merge branch 'parisc-4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller: "The most important changes in this patchset are: - re-enable 64bit PCI bus addresses which were temporarily disabled for PA-RISC in kernel 4.2 - fix the 64bit CAS operation in the LWS path which now enables us to enable the 64bit gcc atomic builtins even on 32bit userspace with 64bit kernel - fix a long-standing bug which sometimes crashed kernel at bootup while serial interrupt wasn't registered yet" * 'parisc-4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Use platform_device_register_simple("rtc-generic") parisc: Drop CONFIG_SMP around update_cr16_clocksource() parisc: Use double word condition in 64bit CAS operation parisc: Filter out spurious interrupts in PA-RISC irq handler parisc: Additionally check for in_atomic() in page fault handler PCI,parisc: Enable 64-bit bus addresses on PA-RISC parisc: Define ioremap_uc and ioremap_wc
This commit is contained in:
commit
839fe9156f
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@ -137,6 +137,8 @@ static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
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return __ioremap(offset, size, _PAGE_NO_CACHE);
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return __ioremap(offset, size, _PAGE_NO_CACHE);
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}
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}
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#define ioremap_nocache(off, sz) ioremap((off), (sz))
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#define ioremap_nocache(off, sz) ioremap((off), (sz))
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#define ioremap_wc ioremap_nocache
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#define ioremap_uc ioremap_nocache
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extern void iounmap(const volatile void __iomem *addr);
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extern void iounmap(const volatile void __iomem *addr);
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@ -507,8 +507,8 @@ void do_cpu_irq_mask(struct pt_regs *regs)
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struct pt_regs *old_regs;
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struct pt_regs *old_regs;
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unsigned long eirr_val;
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unsigned long eirr_val;
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int irq, cpu = smp_processor_id();
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int irq, cpu = smp_processor_id();
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#ifdef CONFIG_SMP
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struct irq_data *irq_data;
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struct irq_data *irq_data;
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#ifdef CONFIG_SMP
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cpumask_t dest;
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cpumask_t dest;
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#endif
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#endif
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@ -521,8 +521,13 @@ void do_cpu_irq_mask(struct pt_regs *regs)
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goto set_out;
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goto set_out;
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irq = eirr_to_irq(eirr_val);
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irq = eirr_to_irq(eirr_val);
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#ifdef CONFIG_SMP
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irq_data = irq_get_irq_data(irq);
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irq_data = irq_get_irq_data(irq);
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/* Filter out spurious interrupts, mostly from serial port at bootup */
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if (unlikely(!irq_desc_has_action(irq_data_to_desc(irq_data))))
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goto set_out;
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#ifdef CONFIG_SMP
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cpumask_copy(&dest, irq_data_get_affinity_mask(irq_data));
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cpumask_copy(&dest, irq_data_get_affinity_mask(irq_data));
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if (irqd_is_per_cpu(irq_data) &&
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if (irqd_is_per_cpu(irq_data) &&
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!cpumask_test_cpu(smp_processor_id(), &dest)) {
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!cpumask_test_cpu(smp_processor_id(), &dest)) {
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@ -821,7 +821,7 @@ cas2_action:
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/* 64bit CAS */
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/* 64bit CAS */
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#ifdef CONFIG_64BIT
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#ifdef CONFIG_64BIT
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19: ldd,ma 0(%sr3,%r26), %r29
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19: ldd,ma 0(%sr3,%r26), %r29
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sub,= %r29, %r25, %r0
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sub,*= %r29, %r25, %r0
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b,n cas2_end
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b,n cas2_end
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20: std,ma %r24, 0(%sr3,%r26)
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20: std,ma %r24, 0(%sr3,%r26)
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copy %r0, %r28
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copy %r0, %r28
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@ -202,7 +202,6 @@ static struct clocksource clocksource_cr16 = {
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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};
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#ifdef CONFIG_SMP
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int update_cr16_clocksource(void)
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int update_cr16_clocksource(void)
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{
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{
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/* since the cr16 cycle counters are not synchronized across CPUs,
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/* since the cr16 cycle counters are not synchronized across CPUs,
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@ -214,12 +213,6 @@ int update_cr16_clocksource(void)
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return 0;
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return 0;
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}
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}
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#else
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int update_cr16_clocksource(void)
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{
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return 0; /* no change */
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}
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#endif /*CONFIG_SMP*/
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void __init start_cpu_itimer(void)
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void __init start_cpu_itimer(void)
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{
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{
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@ -231,20 +224,14 @@ void __init start_cpu_itimer(void)
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per_cpu(cpu_data, cpu).it_value = next_tick;
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per_cpu(cpu_data, cpu).it_value = next_tick;
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}
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}
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static struct platform_device rtc_generic_dev = {
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.name = "rtc-generic",
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.id = -1,
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};
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static int __init rtc_init(void)
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static int __init rtc_init(void)
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{
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{
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if (platform_device_register(&rtc_generic_dev) < 0)
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struct platform_device *pdev;
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printk(KERN_ERR "unable to register rtc device...\n");
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/* not necessarily an error */
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pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
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return 0;
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return PTR_ERR_OR_ZERO(pdev);
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}
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}
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module_init(rtc_init);
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device_initcall(rtc_init);
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void read_persistent_clock(struct timespec *ts)
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void read_persistent_clock(struct timespec *ts)
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{
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{
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@ -207,7 +207,7 @@ void do_page_fault(struct pt_regs *regs, unsigned long code,
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int fault;
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int fault;
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unsigned int flags;
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unsigned int flags;
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if (pagefault_disabled())
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if (faulthandler_disabled())
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goto no_context;
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goto no_context;
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tsk = current;
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tsk = current;
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@ -1555,8 +1555,11 @@ lba_driver_probe(struct parisc_device *dev)
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if (lba_dev->hba.lmmio_space.flags)
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if (lba_dev->hba.lmmio_space.flags)
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pci_add_resource_offset(&resources, &lba_dev->hba.lmmio_space,
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pci_add_resource_offset(&resources, &lba_dev->hba.lmmio_space,
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lba_dev->hba.lmmio_space_offset);
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lba_dev->hba.lmmio_space_offset);
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if (lba_dev->hba.gmmio_space.flags)
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if (lba_dev->hba.gmmio_space.flags) {
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pci_add_resource(&resources, &lba_dev->hba.gmmio_space);
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/* pci_add_resource(&resources, &lba_dev->hba.gmmio_space); */
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pr_warn("LBA: Not registering GMMIO space %pR\n",
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&lba_dev->hba.gmmio_space);
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}
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pci_add_resource(&resources, &lba_dev->hba.bus_num);
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pci_add_resource(&resources, &lba_dev->hba.bus_num);
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@ -2,7 +2,7 @@
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# PCI configuration
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# PCI configuration
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#
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#
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config PCI_BUS_ADDR_T_64BIT
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config PCI_BUS_ADDR_T_64BIT
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def_bool y if (ARCH_DMA_ADDR_T_64BIT || (64BIT && !PARISC))
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def_bool y if (ARCH_DMA_ADDR_T_64BIT || 64BIT)
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depends on PCI
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depends on PCI
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config PCI_MSI
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config PCI_MSI
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