[media] rtl2832: separate tuner specific init from general
It is first step closer to support multiple tuners. Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -382,10 +382,10 @@ err:
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static int rtl2832_init(struct dvb_frontend *fe)
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{
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struct rtl2832_priv *priv = fe->demodulator_priv;
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int i, ret;
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int i, ret, len;
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u8 en_bbin;
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u64 pset_iffreq;
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const struct rtl2832_reg_value *init;
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/* initialization values for the demodulator registers */
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struct rtl2832_reg_value rtl2832_initial_regs[] = {
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@ -432,39 +432,8 @@ static int rtl2832_init(struct dvb_frontend *fe)
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{DVBT_TRK_KC_I2, 0x5},
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{DVBT_CR_THD_SET2, 0x1},
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{DVBT_SPEC_INV, 0x0},
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{DVBT_DAGC_TRG_VAL, 0x5a},
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{DVBT_AGC_TARG_VAL_0, 0x0},
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{DVBT_AGC_TARG_VAL_8_1, 0x5a},
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{DVBT_AAGC_LOOP_GAIN, 0x16},
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{DVBT_LOOP_GAIN2_3_0, 0x6},
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{DVBT_LOOP_GAIN2_4, 0x1},
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{DVBT_LOOP_GAIN3, 0x16},
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{DVBT_VTOP1, 0x35},
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{DVBT_VTOP2, 0x21},
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{DVBT_VTOP3, 0x21},
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{DVBT_KRF1, 0x0},
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{DVBT_KRF2, 0x40},
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{DVBT_KRF3, 0x10},
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{DVBT_KRF4, 0x10},
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{DVBT_IF_AGC_MIN, 0x80},
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{DVBT_IF_AGC_MAX, 0x7f},
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{DVBT_RF_AGC_MIN, 0x80},
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{DVBT_RF_AGC_MAX, 0x7f},
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{DVBT_POLAR_RF_AGC, 0x0},
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{DVBT_POLAR_IF_AGC, 0x0},
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{DVBT_AD7_SETTING, 0xe9bf},
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{DVBT_EN_GI_PGA, 0x0},
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{DVBT_THD_LOCK_UP, 0x0},
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{DVBT_THD_LOCK_DW, 0x0},
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{DVBT_THD_UP1, 0x11},
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{DVBT_THD_DW1, 0xef},
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{DVBT_INTER_CNT_LEN, 0xc},
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{DVBT_GI_PGA_STATE, 0x0},
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{DVBT_EN_AGC_PGA, 0x1},
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{DVBT_IF_AGC_MAN, 0x0},
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};
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dbg("%s", __func__);
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en_bbin = (priv->cfg.if_dvbt == 0 ? 0x1 : 0x0);
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@ -478,8 +447,6 @@ static int rtl2832_init(struct dvb_frontend *fe)
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pset_iffreq = div_u64(pset_iffreq, priv->cfg.xtal);
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pset_iffreq = pset_iffreq & 0x3fffff;
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for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {
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ret = rtl2832_wr_demod_reg(priv, rtl2832_initial_regs[i].reg,
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rtl2832_initial_regs[i].value);
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@ -487,6 +454,27 @@ static int rtl2832_init(struct dvb_frontend *fe)
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goto err;
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}
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/* load tuner specific settings */
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dbg("%s: load settings for tuner=%02x", __func__, priv->cfg.tuner);
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switch (priv->cfg.tuner) {
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case RTL2832_TUNER_FC0012:
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case RTL2832_TUNER_FC0013:
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len = ARRAY_SIZE(rtl2832_tuner_init_fc0012);
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init = rtl2832_tuner_init_fc0012;
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break;
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default:
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ret = -EINVAL;
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goto err;
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}
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for (i = 0; i < len; i++) {
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ret = rtl2832_wr_demod_reg(priv,
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rtl2832_tuner_init_fc0012[i].reg,
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rtl2832_tuner_init_fc0012[i].value);
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if (ret)
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goto err;
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}
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/* if frequency settings */
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ret = rtl2832_wr_demod_reg(priv, DVBT_EN_BBIN, en_bbin);
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if (ret)
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@ -44,11 +44,14 @@ struct rtl2832_config {
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u32 if_dvbt;
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/*
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* tuner
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* XXX: This must be keep sync with dvb_usb_rtl28xxu demod driver.
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*/
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#define RTL2832_TUNER_FC0012 0x26
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#define RTL2832_TUNER_FC0013 0x29
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u8 tuner;
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};
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#if defined(CONFIG_DVB_RTL2832) || \
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(defined(CONFIG_DVB_RTL2832_MODULE) && defined(MODULE))
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extern struct dvb_frontend *rtl2832_attach(
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@ -257,4 +257,37 @@ enum DVBT_REG_BIT_NAME {
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DVBT_REG_BIT_NAME_ITEM_TERMINATOR,
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};
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static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
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{DVBT_DAGC_TRG_VAL, 0x5a},
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{DVBT_AGC_TARG_VAL_0, 0x0},
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{DVBT_AGC_TARG_VAL_8_1, 0x5a},
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{DVBT_AAGC_LOOP_GAIN, 0x16},
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{DVBT_LOOP_GAIN2_3_0, 0x6},
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{DVBT_LOOP_GAIN2_4, 0x1},
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{DVBT_LOOP_GAIN3, 0x16},
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{DVBT_VTOP1, 0x35},
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{DVBT_VTOP2, 0x21},
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{DVBT_VTOP3, 0x21},
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{DVBT_KRF1, 0x0},
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{DVBT_KRF2, 0x40},
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{DVBT_KRF3, 0x10},
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{DVBT_KRF4, 0x10},
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{DVBT_IF_AGC_MIN, 0x80},
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{DVBT_IF_AGC_MAX, 0x7f},
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{DVBT_RF_AGC_MIN, 0x80},
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{DVBT_RF_AGC_MAX, 0x7f},
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{DVBT_POLAR_RF_AGC, 0x0},
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{DVBT_POLAR_IF_AGC, 0x0},
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{DVBT_AD7_SETTING, 0xe9bf},
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{DVBT_EN_GI_PGA, 0x0},
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{DVBT_THD_LOCK_UP, 0x0},
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{DVBT_THD_LOCK_DW, 0x0},
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{DVBT_THD_UP1, 0x11},
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{DVBT_THD_DW1, 0xef},
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{DVBT_INTER_CNT_LEN, 0xc},
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{DVBT_GI_PGA_STATE, 0x0},
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{DVBT_EN_AGC_PGA, 0x1},
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{DVBT_IF_AGC_MAN, 0x0},
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};
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#endif /* RTL2832_PRIV_H */
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@ -63,14 +63,15 @@ enum rtl28xxu_chip_id {
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CHIP_ID_RTL2832U,
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};
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/* XXX: Hack. This must be keep sync with rtl2832 demod driver. */
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enum rtl28xxu_tuner {
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TUNER_NONE,
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TUNER_RTL2830_QT1010,
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TUNER_RTL2830_QT1010 = 0x10,
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TUNER_RTL2830_MT2060,
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TUNER_RTL2830_MXL5005S,
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TUNER_RTL2832_MT2266,
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TUNER_RTL2832_MT2266 = 0x20,
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TUNER_RTL2832_FC2580,
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TUNER_RTL2832_MT2063,
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TUNER_RTL2832_MAX3543,
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