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ARM: dts: add DTS for NetCom Plus 4xx and 8xx device series 

This DTS file covers all four and eight port NetCom Plus devices.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Yegor Yefremov 2019-10-22 09:21:30 +02:00 committed by Tony Lindgren
parent 9e4dee95d7
commit 830834c450
2 changed files with 116 additions and 0 deletions
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1
arch/arm/boot/dts/Makefile
View File

@ -755,6 +755,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-nano.dtb \
am335x-netcan-plus-1xx.dtb \
am335x-netcom-plus-2xx.dtb \
am335x-netcom-plus-8xx.dtb \
am335x-pdu001.dtb \
am335x-pepper.dtb \
am335x-phycore-rdk.dtb \

115
arch/arm/boot/dts/am335x-netcom-plus-8xx.dts Normal file
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@ -0,0 +1,115 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*/
/*
* VScom OnRISC
* http://www.vscom.de
*/
/dts-v1/;
#include "am335x-baltos.dtsi"
/ {
model = "NetCom Plus";
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&dip_switches>;
dip_switches: pinmux_dip_switches {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)
>;
};
tca6416_pins: pinmux_tca6416_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7)
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
>;
};
};
&usb0_phy {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&usb1 {
status = "okay";
dr_mode = "host";
};
&i2c1 {
tca6416a: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio0>;
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&tca6416_pins>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <400000>;
tca6416b: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
tca6416c: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
};
&davinci_mdio {
phy0: ethernet-phy@0 {
reg = <1>;
};
};
&cpsw_emac0 {
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
phy-handle = <&phy0>;
};
&cpsw_emac1 {
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};