ARM: bcmring: convert to sp804 clocksource
bcmring has a set of four sp804 timers incorporated, yet it has its own copy of the sp804 code. Convert its clocksource implementation to the standard sp804 support code. Cc: Jiandong Zheng <jdzheng@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -297,6 +297,7 @@ config ARCH_BCMRING
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depends on MMU
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select CPU_V6
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select ARM_AMBA
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select ARM_TIMER_SP804
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select CLKDEV_LOOKUP
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select GENERIC_CLOCKEVENTS
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select ARCH_WANT_OPTIONAL_GPIOLIB
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@ -37,6 +37,7 @@
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/hardware/timer-sp.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -97,6 +98,35 @@ static struct clk dummy_apb_pclk = {
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.mode = CLK_MODE_XTAL,
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};
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/* Timer 0 - 25 MHz, Timer3 at bus clock rate, typically 150-166 MHz */
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#if defined(CONFIG_ARCH_FPGA11107)
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/* fpga cpu/bus are currently 30 times slower so scale frequency as well to */
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/* slow down Linux's sense of time */
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#define TIMER0_FREQUENCY_MHZ (tmrHw_LOW_FREQUENCY_MHZ * 30)
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#define TIMER1_FREQUENCY_MHZ (tmrHw_LOW_FREQUENCY_MHZ * 30)
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#define TIMER3_FREQUENCY_MHZ (tmrHw_HIGH_FREQUENCY_MHZ * 30)
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#define TIMER3_FREQUENCY_KHZ (tmrHw_HIGH_FREQUENCY_HZ / 1000 * 30)
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#else
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#define TIMER0_FREQUENCY_MHZ tmrHw_LOW_FREQUENCY_MHZ
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#define TIMER1_FREQUENCY_MHZ tmrHw_LOW_FREQUENCY_MHZ
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#define TIMER3_FREQUENCY_MHZ tmrHw_HIGH_FREQUENCY_MHZ
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#define TIMER3_FREQUENCY_KHZ (tmrHw_HIGH_FREQUENCY_HZ / 1000)
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#endif
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static struct clk sp804_timer1_clk = {
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.name = "sp804-timer-1",
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.type = CLK_TYPE_PRIMARY,
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.mode = CLK_MODE_XTAL,
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.rate_hz = TIMER1_FREQUENCY_MHZ * 1000000,
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};
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static struct clk sp804_timer3_clk = {
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.name = "sp804-timer-3",
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.type = CLK_TYPE_PRIMARY,
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.mode = CLK_MODE_XTAL,
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.rate_hz = TIMER3_FREQUENCY_KHZ * 1000,
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};
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static struct clk_lookup lookups[] = {
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{ /* Bus clock */
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.con_id = "apb_pclk",
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@ -107,6 +137,14 @@ static struct clk_lookup lookups[] = {
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}, { /* UART1 */
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.dev_id = "uartb",
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.clk = &uart_clk,
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}, { /* SP804 timer 1 */
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.dev_id = "sp804",
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.con_id = "timer1",
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.clk = &sp804_timer1_clk,
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}, { /* SP804 timer 3 */
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.dev_id = "sp804",
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.con_id = "timer3",
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.clk = &sp804_timer3_clk,
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}
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};
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@ -160,25 +198,10 @@ void __init bcmring_amba_init(void)
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/*
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* Where is the timer (VA)?
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*/
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#define TIMER0_VA_BASE MM_IO_BASE_TMR
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#define TIMER1_VA_BASE (MM_IO_BASE_TMR + 0x20)
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#define TIMER2_VA_BASE (MM_IO_BASE_TMR + 0x40)
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#define TIMER3_VA_BASE (MM_IO_BASE_TMR + 0x60)
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/* Timer 0 - 25 MHz, Timer3 at bus clock rate, typically 150-166 MHz */
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#if defined(CONFIG_ARCH_FPGA11107)
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/* fpga cpu/bus are currently 30 times slower so scale frequency as well to */
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/* slow down Linux's sense of time */
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#define TIMER0_FREQUENCY_MHZ (tmrHw_LOW_FREQUENCY_MHZ * 30)
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#define TIMER1_FREQUENCY_MHZ (tmrHw_LOW_FREQUENCY_MHZ * 30)
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#define TIMER3_FREQUENCY_MHZ (tmrHw_HIGH_FREQUENCY_MHZ * 30)
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#define TIMER3_FREQUENCY_KHZ (tmrHw_HIGH_FREQUENCY_HZ / 1000 * 30)
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#else
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#define TIMER0_FREQUENCY_MHZ tmrHw_LOW_FREQUENCY_MHZ
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#define TIMER1_FREQUENCY_MHZ tmrHw_LOW_FREQUENCY_MHZ
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#define TIMER3_FREQUENCY_MHZ tmrHw_HIGH_FREQUENCY_MHZ
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#define TIMER3_FREQUENCY_KHZ (tmrHw_HIGH_FREQUENCY_HZ / 1000)
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#endif
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#define TIMER0_VA_BASE ((void __iomem *)MM_IO_BASE_TMR)
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#define TIMER1_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x20))
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#define TIMER2_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x40))
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#define TIMER3_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x60))
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#define TICKS_PER_uSEC TIMER0_FREQUENCY_MHZ
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@ -187,10 +210,7 @@ void __init bcmring_amba_init(void)
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*
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*/
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#define mSEC_1 1000
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#define mSEC_5 (mSEC_1 * 5)
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#define mSEC_10 (mSEC_1 * 10)
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#define mSEC_25 (mSEC_1 * 25)
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#define SEC_1 (mSEC_1 * 1000)
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/*
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* How long is the timer interval?
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@ -277,53 +297,13 @@ static struct irqaction bcmring_timer_irq = {
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.handler = bcmring_timer_interrupt,
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};
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static cycle_t bcmring_get_cycles_timer1(struct clocksource *cs)
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{
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return ~readl(TIMER1_VA_BASE + TIMER_VALUE);
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}
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static cycle_t bcmring_get_cycles_timer3(struct clocksource *cs)
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{
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return ~readl(TIMER3_VA_BASE + TIMER_VALUE);
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}
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static struct clocksource clocksource_bcmring_timer1 = {
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.name = "timer1",
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.rating = 200,
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.read = bcmring_get_cycles_timer1,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static struct clocksource clocksource_bcmring_timer3 = {
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.name = "timer3",
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.rating = 100,
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.read = bcmring_get_cycles_timer3,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int __init bcmring_clocksource_init(void)
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{
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/* setup timer1 as free-running clocksource */
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writel(0, TIMER1_VA_BASE + TIMER_CTRL);
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writel(0xffffffff, TIMER1_VA_BASE + TIMER_LOAD);
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writel(0xffffffff, TIMER1_VA_BASE + TIMER_VALUE);
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writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
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TIMER1_VA_BASE + TIMER_CTRL);
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clocksource_register_khz(&clocksource_bcmring_timer1,
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TIMER1_FREQUENCY_MHZ * 1000);
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sp804_clocksource_init(TIMER1_VA_BASE, "timer1");
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/* setup timer3 as free-running clocksource */
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writel(0, TIMER3_VA_BASE + TIMER_CTRL);
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writel(0xffffffff, TIMER3_VA_BASE + TIMER_LOAD);
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writel(0xffffffff, TIMER3_VA_BASE + TIMER_VALUE);
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writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
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TIMER3_VA_BASE + TIMER_CTRL);
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clocksource_register_khz(&clocksource_bcmring_timer3,
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TIMER3_FREQUENCY_KHZ);
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sp804_clocksource_init(TIMER3_VA_BASE, "timer3");
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return 0;
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}
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