Fix a long time regression for ir-rx51 driver for n900 device tree
booting. This driver has been unusable with multiarch because of the hardware timer access. With the recent PWM changes, we can finally fix the driver for multiarch and device tree support. And naturally there is no rush for these for the -rc cycle, these can wait for the merge window. The PWM changes have been acked by Thierry. For the media changes I did not get an ack from Mauro but he was Cc'd in the discussion and these changes do not conflict with other media changes. After this series we can drop the remaining omap3 legacy booting board files finally. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXe1v2AAoJEBvUPslcq6VzLvsQALIWLcgyqUKNgPV6EOxAsxeO azvjPPZgI0oTl5+voS6dzSg5mXhQt3rVlaXxJXxCdxYgOf67zYjugrJqf5Sm4stF BEtzPGLRTwR8miJbHNB8eGfcBGU3q+hx19dT+U7EAsPQqItlFfxVTh5ZzS0TOZc2 9bQGO6MYIWNEk6V0TRxNUfRt+4fQN17zRdIpKL8NCJOsoBn9ZpztB76GeHUnd34t pYeaMFPdVUqBCQOmE9EA3dmOB7q37JgtsM312zpn72OgzpTTttza1Vo6HAh7dTWM Pmphin+H54zmsrB3wvI0h4G2WmuZjNNEHBTbLV4fgTjDer4o84RHJUGOgQmmPnni q9nyuV0y1gudk8ihlq7hxnickPS+NCSk8aQgAfspY+8rhxYWstJdJ66gUl+bUPlQ qaOvNACaEMVuRdeqnuTLm/mhQdVLz5VuUzSZkAWosVVuCVY9ONLt/t/Mxbylqf9P CfKiDBEUp+DQ8Ly4L0odD7n4fOWOq6XOx3RR6C4IJqkLyb6VL5O8POKNsHuMvb1q ptWyN1aWHrdYvd4PD0QB6hakY+C2P9BSAMb0t9ZscAX1nGvkGY27TRzHD8rkhHZD WKy5J4gzr8VDLnQom9MwoXcoqrWKTGY5QCqw1hdUrqNlVnRJTu2jYc5NrYxOK0mD TUC5drgK5e2mjmgUv95q =frvc -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.8/ir-rx51-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers Merge "omap ir-rx51 driver fixes for multiarch for v4.8 merge window" from Tony Lindgren: Fix a long time regression for ir-rx51 driver for n900 device tree booting. This driver has been unusable with multiarch because of the hardware timer access. With the recent PWM changes, we can finally fix the driver for multiarch and device tree support. And naturally there is no rush for these for the -rc cycle, these can wait for the merge window. The PWM changes have been acked by Thierry. For the media changes I did not get an ack from Mauro but he was Cc'd in the discussion and these changes do not conflict with other media changes. After this series we can drop the remaining omap3 legacy booting board files finally. * tag 'omap-for-v4.8/ir-rx51-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ir-rx51: use hrtimer instead of dmtimer ir-rx51: add DT support to driver ir-rx51: use PWM framework instead of OMAP dmtimer pwm: omap-dmtimer: Allow for setting dmtimer clock source ir-rx51: Fix build after multiarch changes broke it
This commit is contained in:
Arnd Bergmann
commit
82be1178ee
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@ -0,0 +1,20 @@
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Device-Tree bindings for LIRC TX driver for Nokia N900(RX51)
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Required properties:
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- compatible: should be "nokia,n900-ir".
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- pwms: specifies PWM used for IR signal transmission.
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Example node:
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pwm9: dmtimer-pwm@9 {
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compatible = "ti,omap-dmtimer-pwm";
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ti,timers = <&timer9>;
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ti,clock-source = <0x00>; /* timer_sys_ck */
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#pwm-cells = <3>;
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};
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ir: n900-ir {
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compatible = "nokia,n900-ir";
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pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
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};
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@ -9,6 +9,10 @@ Required properties:
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Optional properties:
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- ti,prescaler: Should be a value between 0 and 7, see the timers datasheet
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- ti,clock-source: Set dmtimer parent clock, values between 0 and 2:
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- 0x00 - high-frequency system clock (timer_sys_ck)
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- 0x01 - 32-kHz always-on clock (timer_32k_ck)
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- 0x02 - external clock (timer_ext_ck, OMAP2 only)
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Example:
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pwm9: dmtimer-pwm@9 {
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@ -1242,11 +1242,6 @@ static struct pwm_omap_dmtimer_pdata __maybe_unused pwm_dmtimer_pdata = {
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#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
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static struct lirc_rx51_platform_data rx51_lirc_data = {
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.set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
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.pwm_timer = 9, /* Use GPT 9 for CIR */
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#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
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.dmtimer = &pwm_dmtimer_pdata,
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#endif
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};
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static struct platform_device rx51_lirc_device = {
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@ -273,8 +273,6 @@ static struct platform_device omap3_rom_rng_device = {
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},
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};
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static struct platform_device rx51_lirc_device;
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static void __init nokia_n900_legacy_init(void)
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{
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hsmmc2_internal_input_clk();
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@ -293,10 +291,7 @@ static void __init nokia_n900_legacy_init(void)
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pr_info("RX-51: Registering OMAP3 HWRNG device\n");
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platform_device_register(&omap3_rom_rng_device);
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}
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platform_device_register(&rx51_lirc_device);
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}
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static void __init omap3_tao3530_legacy_init(void)
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@ -491,10 +486,6 @@ static struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = {
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static struct lirc_rx51_platform_data __maybe_unused rx51_lirc_data = {
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.set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
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.pwm_timer = 9, /* Use GPT 9 for CIR */
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#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
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.dmtimer = &pwm_dmtimer_pdata,
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#endif
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};
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static struct platform_device __maybe_unused rx51_lirc_device = {
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@ -532,6 +523,7 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
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&omap3_iommu_pdata),
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OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]),
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OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]),
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OF_DEV_AUXDATA("nokia,n900-ir", 0, "n900-ir", &rx51_lirc_data),
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/* Only on am3517 */
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OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
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OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
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@ -336,7 +336,7 @@ config IR_TTUSBIR
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config IR_RX51
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tristate "Nokia N900 IR transmitter diode"
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depends on OMAP_DM_TIMER && ARCH_OMAP2PLUS && LIRC && !ARCH_MULTIPLATFORM
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depends on OMAP_DM_TIMER && PWM_OMAP_DMTIMER && ARCH_OMAP2PLUS && LIRC
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---help---
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Say Y or M here if you want to enable support for the IR
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transmitter diode built in the Nokia N900 (RX51) device.
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@ -12,22 +12,17 @@
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/uaccess.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <linux/wait.h>
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#include <plat/dmtimer.h>
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#include <plat/clock.h>
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#include <linux/pwm.h>
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#include <linux/of.h>
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#include <linux/hrtimer.h>
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#include <media/lirc.h>
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#include <media/lirc_dev.h>
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@ -41,100 +36,51 @@
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#define WBUF_LEN 256
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#define TIMER_MAX_VALUE 0xffffffff
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struct lirc_rx51 {
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struct omap_dm_timer *pwm_timer;
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struct omap_dm_timer *pulse_timer;
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struct pwm_device *pwm;
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struct hrtimer timer;
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struct device *dev;
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struct lirc_rx51_platform_data *pdata;
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wait_queue_head_t wqueue;
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unsigned long fclk_khz;
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unsigned int freq; /* carrier frequency */
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unsigned int duty_cycle; /* carrier duty cycle */
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unsigned int irq_num;
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unsigned int match;
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int wbuf[WBUF_LEN];
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int wbuf_index;
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unsigned long device_is_open;
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int pwm_timer_num;
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};
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static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
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static inline void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
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{
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omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
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OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
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pwm_enable(lirc_rx51->pwm);
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}
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static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
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static inline void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
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{
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omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
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OMAP_TIMER_TRIGGER_NONE);
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pwm_disable(lirc_rx51->pwm);
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}
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static int init_timing_params(struct lirc_rx51 *lirc_rx51)
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{
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u32 load, match;
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struct pwm_device *pwm = lirc_rx51->pwm;
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int duty, period = DIV_ROUND_CLOSEST(NSEC_PER_SEC, lirc_rx51->freq);
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load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq);
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match = -(lirc_rx51->duty_cycle * -load / 100);
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omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load);
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omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match);
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omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
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omap_dm_timer_start(lirc_rx51->pwm_timer);
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omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
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omap_dm_timer_start(lirc_rx51->pulse_timer);
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duty = DIV_ROUND_CLOSEST(lirc_rx51->duty_cycle * period, 100);
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lirc_rx51->match = 0;
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pwm_config(pwm, duty, period);
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return 0;
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}
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#define tics_after(a, b) ((long)(b) - (long)(a) < 0)
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static int pulse_timer_set_timeout(struct lirc_rx51 *lirc_rx51, int usec)
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static enum hrtimer_restart lirc_rx51_timer_cb(struct hrtimer *timer)
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{
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int counter;
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struct lirc_rx51 *lirc_rx51 =
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container_of(timer, struct lirc_rx51, timer);
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ktime_t now;
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BUG_ON(usec < 0);
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if (lirc_rx51->match == 0)
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counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer);
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else
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counter = lirc_rx51->match;
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counter += (u32)(lirc_rx51->fclk_khz * usec / (1000));
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omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter);
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omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer,
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OMAP_TIMER_INT_MATCH);
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if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer),
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counter)) {
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return 1;
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}
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return 0;
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}
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static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
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{
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unsigned int retval;
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struct lirc_rx51 *lirc_rx51 = ptr;
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retval = omap_dm_timer_read_status(lirc_rx51->pulse_timer);
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if (!retval)
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return IRQ_NONE;
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if (retval & ~OMAP_TIMER_INT_MATCH)
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dev_err_ratelimited(lirc_rx51->dev,
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": Unexpected interrupt source: %x\n", retval);
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omap_dm_timer_write_status(lirc_rx51->pulse_timer,
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OMAP_TIMER_INT_MATCH |
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OMAP_TIMER_INT_OVERFLOW |
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OMAP_TIMER_INT_CAPTURE);
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if (lirc_rx51->wbuf_index < 0) {
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dev_err_ratelimited(lirc_rx51->dev,
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": BUG wbuf_index has value of %i\n",
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"BUG wbuf_index has value of %i\n",
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lirc_rx51->wbuf_index);
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goto end;
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}
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@ -144,6 +90,8 @@ static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
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* pulses until we catch up.
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*/
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do {
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u64 ns;
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if (lirc_rx51->wbuf_index >= WBUF_LEN)
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goto end;
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if (lirc_rx51->wbuf[lirc_rx51->wbuf_index] == -1)
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@ -154,84 +102,24 @@ static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
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else
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lirc_rx51_on(lirc_rx51);
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retval = pulse_timer_set_timeout(lirc_rx51,
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lirc_rx51->wbuf[lirc_rx51->wbuf_index]);
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ns = 1000 * lirc_rx51->wbuf[lirc_rx51->wbuf_index];
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hrtimer_add_expires_ns(timer, ns);
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lirc_rx51->wbuf_index++;
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} while (retval);
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now = timer->base->get_time();
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return IRQ_HANDLED;
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} while (hrtimer_get_expires_tv64(timer) < now.tv64);
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return HRTIMER_RESTART;
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end:
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/* Stop TX here */
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lirc_rx51_off(lirc_rx51);
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lirc_rx51->wbuf_index = -1;
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omap_dm_timer_stop(lirc_rx51->pwm_timer);
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omap_dm_timer_stop(lirc_rx51->pulse_timer);
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omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
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wake_up_interruptible(&lirc_rx51->wqueue);
|
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|
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return IRQ_HANDLED;
|
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}
|
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|
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static int lirc_rx51_init_port(struct lirc_rx51 *lirc_rx51)
|
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{
|
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struct clk *clk_fclk;
|
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int retval, pwm_timer = lirc_rx51->pwm_timer_num;
|
||||
|
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lirc_rx51->pwm_timer = omap_dm_timer_request_specific(pwm_timer);
|
||||
if (lirc_rx51->pwm_timer == NULL) {
|
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dev_err(lirc_rx51->dev, ": Error requesting GPT%d timer\n",
|
||||
pwm_timer);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
lirc_rx51->pulse_timer = omap_dm_timer_request();
|
||||
if (lirc_rx51->pulse_timer == NULL) {
|
||||
dev_err(lirc_rx51->dev, ": Error requesting pulse timer\n");
|
||||
retval = -EBUSY;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
omap_dm_timer_set_source(lirc_rx51->pwm_timer, OMAP_TIMER_SRC_SYS_CLK);
|
||||
omap_dm_timer_set_source(lirc_rx51->pulse_timer,
|
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OMAP_TIMER_SRC_SYS_CLK);
|
||||
|
||||
omap_dm_timer_enable(lirc_rx51->pwm_timer);
|
||||
omap_dm_timer_enable(lirc_rx51->pulse_timer);
|
||||
|
||||
lirc_rx51->irq_num = omap_dm_timer_get_irq(lirc_rx51->pulse_timer);
|
||||
retval = request_irq(lirc_rx51->irq_num, lirc_rx51_interrupt_handler,
|
||||
IRQF_SHARED, "lirc_pulse_timer", lirc_rx51);
|
||||
if (retval) {
|
||||
dev_err(lirc_rx51->dev, ": Failed to request interrupt line\n");
|
||||
goto err2;
|
||||
}
|
||||
|
||||
clk_fclk = omap_dm_timer_get_fclk(lirc_rx51->pwm_timer);
|
||||
lirc_rx51->fclk_khz = clk_fclk->rate / 1000;
|
||||
|
||||
return 0;
|
||||
|
||||
err2:
|
||||
omap_dm_timer_free(lirc_rx51->pulse_timer);
|
||||
err1:
|
||||
omap_dm_timer_free(lirc_rx51->pwm_timer);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static int lirc_rx51_free_port(struct lirc_rx51 *lirc_rx51)
|
||||
{
|
||||
omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
|
||||
free_irq(lirc_rx51->irq_num, lirc_rx51);
|
||||
lirc_rx51_off(lirc_rx51);
|
||||
omap_dm_timer_disable(lirc_rx51->pwm_timer);
|
||||
omap_dm_timer_disable(lirc_rx51->pulse_timer);
|
||||
omap_dm_timer_free(lirc_rx51->pwm_timer);
|
||||
omap_dm_timer_free(lirc_rx51->pulse_timer);
|
||||
lirc_rx51->wbuf_index = -1;
|
||||
|
||||
return 0;
|
||||
return HRTIMER_NORESTART;
|
||||
}
|
||||
|
||||
static ssize_t lirc_rx51_write(struct file *file, const char *buf,
|
||||
|
|
@ -270,8 +158,9 @@ static ssize_t lirc_rx51_write(struct file *file, const char *buf,
|
|||
|
||||
lirc_rx51_on(lirc_rx51);
|
||||
lirc_rx51->wbuf_index = 1;
|
||||
pulse_timer_set_timeout(lirc_rx51, lirc_rx51->wbuf[0]);
|
||||
|
||||
hrtimer_start(&lirc_rx51->timer,
|
||||
ns_to_ktime(1000 * lirc_rx51->wbuf[0]),
|
||||
HRTIMER_MODE_REL);
|
||||
/*
|
||||
* Don't return back to the userspace until the transfer has
|
||||
* finished
|
||||
|
|
@ -371,14 +260,24 @@ static int lirc_rx51_open(struct inode *inode, struct file *file)
|
|||
if (test_and_set_bit(1, &lirc_rx51->device_is_open))
|
||||
return -EBUSY;
|
||||
|
||||
return lirc_rx51_init_port(lirc_rx51);
|
||||
lirc_rx51->pwm = pwm_get(lirc_rx51->dev, NULL);
|
||||
if (IS_ERR(lirc_rx51->pwm)) {
|
||||
int res = PTR_ERR(lirc_rx51->pwm);
|
||||
|
||||
dev_err(lirc_rx51->dev, "pwm_get failed: %d\n", res);
|
||||
return res;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lirc_rx51_release(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct lirc_rx51 *lirc_rx51 = file->private_data;
|
||||
|
||||
lirc_rx51_free_port(lirc_rx51);
|
||||
hrtimer_cancel(&lirc_rx51->timer);
|
||||
lirc_rx51_off(lirc_rx51);
|
||||
pwm_put(lirc_rx51->pwm);
|
||||
|
||||
clear_bit(1, &lirc_rx51->device_is_open);
|
||||
|
||||
|
|
@ -386,7 +285,6 @@ static int lirc_rx51_release(struct inode *inode, struct file *file)
|
|||
}
|
||||
|
||||
static struct lirc_rx51 lirc_rx51 = {
|
||||
.freq = 38000,
|
||||
.duty_cycle = 50,
|
||||
.wbuf_index = -1,
|
||||
};
|
||||
|
|
@ -444,9 +342,32 @@ static int lirc_rx51_resume(struct platform_device *dev)
|
|||
|
||||
static int lirc_rx51_probe(struct platform_device *dev)
|
||||
{
|
||||
struct pwm_device *pwm;
|
||||
|
||||
lirc_rx51_driver.features = LIRC_RX51_DRIVER_FEATURES;
|
||||
lirc_rx51.pdata = dev->dev.platform_data;
|
||||
lirc_rx51.pwm_timer_num = lirc_rx51.pdata->pwm_timer;
|
||||
|
||||
if (!lirc_rx51.pdata) {
|
||||
dev_err(&dev->dev, "Platform Data is missing\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
pwm = pwm_get(&dev->dev, NULL);
|
||||
if (IS_ERR(pwm)) {
|
||||
int err = PTR_ERR(pwm);
|
||||
|
||||
if (err != -EPROBE_DEFER)
|
||||
dev_err(&dev->dev, "pwm_get failed: %d\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Use default, in case userspace does not set the carrier */
|
||||
lirc_rx51.freq = DIV_ROUND_CLOSEST(pwm_get_period(pwm), NSEC_PER_SEC);
|
||||
pwm_put(pwm);
|
||||
|
||||
hrtimer_init(&lirc_rx51.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
||||
lirc_rx51.timer.function = lirc_rx51_timer_cb;
|
||||
|
||||
lirc_rx51.dev = &dev->dev;
|
||||
lirc_rx51_driver.dev = &dev->dev;
|
||||
lirc_rx51_driver.minor = lirc_register_driver(&lirc_rx51_driver);
|
||||
|
|
@ -457,8 +378,6 @@ static int lirc_rx51_probe(struct platform_device *dev)
|
|||
lirc_rx51_driver.minor);
|
||||
return lirc_rx51_driver.minor;
|
||||
}
|
||||
dev_info(lirc_rx51.dev, "registration ok, minor: %d, pwm: %d\n",
|
||||
lirc_rx51_driver.minor, lirc_rx51.pwm_timer_num);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -468,6 +387,14 @@ static int lirc_rx51_remove(struct platform_device *dev)
|
|||
return lirc_unregister_driver(lirc_rx51_driver.minor);
|
||||
}
|
||||
|
||||
static const struct of_device_id lirc_rx51_match[] = {
|
||||
{
|
||||
.compatible = "nokia,n900-ir",
|
||||
},
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, lirc_rx51_match);
|
||||
|
||||
struct platform_driver lirc_rx51_platform_driver = {
|
||||
.probe = lirc_rx51_probe,
|
||||
.remove = lirc_rx51_remove,
|
||||
|
|
@ -475,7 +402,7 @@ struct platform_driver lirc_rx51_platform_driver = {
|
|||
.resume = lirc_rx51_resume,
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = of_match_ptr(lirc_rx51_match),
|
||||
},
|
||||
};
|
||||
module_platform_driver(lirc_rx51_platform_driver);
|
||||
|
|
|
|||
|
|
@ -245,7 +245,7 @@ static int pwm_omap_dmtimer_probe(struct platform_device *pdev)
|
|||
struct pwm_omap_dmtimer_chip *omap;
|
||||
struct pwm_omap_dmtimer_pdata *pdata;
|
||||
pwm_omap_dmtimer *dm_timer;
|
||||
u32 prescaler;
|
||||
u32 v;
|
||||
int status;
|
||||
|
||||
pdata = dev_get_platdata(&pdev->dev);
|
||||
|
|
@ -306,10 +306,12 @@ static int pwm_omap_dmtimer_probe(struct platform_device *pdev)
|
|||
if (pm_runtime_active(&omap->dm_timer_pdev->dev))
|
||||
omap->pdata->stop(omap->dm_timer);
|
||||
|
||||
/* setup dmtimer prescaler */
|
||||
if (!of_property_read_u32(pdev->dev.of_node, "ti,prescaler",
|
||||
&prescaler))
|
||||
omap->pdata->set_prescaler(omap->dm_timer, prescaler);
|
||||
if (!of_property_read_u32(pdev->dev.of_node, "ti,prescaler", &v))
|
||||
omap->pdata->set_prescaler(omap->dm_timer, v);
|
||||
|
||||
/* setup dmtimer clock source */
|
||||
if (!of_property_read_u32(pdev->dev.of_node, "ti,clock-source", &v))
|
||||
omap->pdata->set_source(omap->dm_timer, v);
|
||||
|
||||
omap->chip.dev = &pdev->dev;
|
||||
omap->chip.ops = &pwm_omap_dmtimer_ops;
|
||||
|
|
|
|||
|
|
@ -2,10 +2,7 @@
|
|||
#define _LIRC_RX51_H
|
||||
|
||||
struct lirc_rx51_platform_data {
|
||||
int pwm_timer;
|
||||
|
||||
int(*set_max_mpu_wakeup_lat)(struct device *dev, long t);
|
||||
struct pwm_omap_dmtimer_pdata *dmtimer;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue