ASoC: SOF: Intel: remove unnecessary waitq before loading firmware
The HDA_DSP_IPC_PURGE_FW IPC from ROM is already handled in cl_dsp_init(), and it will never be received in the IRQ thread, so the wait condition on this IPC will never be satisfied. The wait before loading firmware is redundant and can be removed safely. Signed-off-by: Amery Song <chao.song@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Keyon Jie <yang.jie@linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Pierre Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Link: https://lore.kernel.org/r/20200312200622.24477-6-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -65,11 +65,6 @@ static irqreturn_t cnl_ipc_irq_thread(int irq, void *context)
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hda_dsp_ipc_get_reply(sdev);
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snd_sof_ipc_reply(sdev, msg);
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if (sdev->code_loading) {
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sdev->code_loading = 0;
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wake_up(&sdev->waitq);
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}
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cnl_ipc_dsp_done(sdev);
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spin_unlock_irq(&sdev->ipc_lock);
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@ -174,12 +174,6 @@ irqreturn_t hda_dsp_ipc_irq_thread(int irq, void *context)
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hda_dsp_ipc_get_reply(sdev);
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snd_sof_ipc_reply(sdev, msg);
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/* wake up sleeper if we are loading code */
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if (sdev->code_loading) {
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sdev->code_loading = 0;
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wake_up(&sdev->waitq);
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}
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/* set the done bit */
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hda_dsp_ipc_dsp_done(sdev);
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@ -179,9 +179,6 @@ static int cl_trigger(struct snd_sof_dev *sdev,
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/* code loader is special case that reuses stream ops */
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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wait_event_timeout(sdev->waitq, !sdev->code_loading,
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HDA_DSP_CL_TRIGGER_TIMEOUT);
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
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1 << hstream->index,
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1 << hstream->index);
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@ -585,9 +585,6 @@ int hda_dsp_probe(struct snd_sof_dev *sdev)
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hda_dsp_ctrl_ppcap_enable(sdev, true);
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hda_dsp_ctrl_ppcap_int_enable(sdev, true);
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/* initialize waitq for code loading */
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init_waitqueue_head(&sdev->waitq);
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/* set default mailbox offset for FW ready message */
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sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
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@ -175,7 +175,6 @@
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* value cannot be read back within the specified time.
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*/
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#define HDA_DSP_STREAM_RUN_TIMEOUT 300
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#define HDA_DSP_CL_TRIGGER_TIMEOUT 300
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#define HDA_DSP_SPIB_ENABLE 1
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#define HDA_DSP_SPIB_DISABLE 0
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@ -466,9 +466,6 @@ int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev)
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const char *fw_filename;
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int ret;
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/* set code loading condition to true */
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sdev->code_loading = 1;
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/* Don't request firmware again if firmware is already requested */
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if (plat_data->fw)
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return 0;
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@ -421,10 +421,6 @@ struct snd_sof_dev {
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int ipc_timeout;
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int boot_timeout;
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/* Wait queue for code loading */
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wait_queue_head_t waitq;
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int code_loading;
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES)
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unsigned int extractor_stream_tag;
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#endif
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