mei: separate compilation of the ME hardware specifics
We add struct mei_hw_ops to virtualize access to hw specific configurations. This allows us to separate the compilation of the ME interface from the ME hardware specifics Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Tomas Winkler
Greg Kroah-Hartman
parent
52c3456141
commit
827eef51f8
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@ -1,11 +1,22 @@
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config INTEL_MEI
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tristate "Intel Management Engine Interface (Intel MEI)"
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depends on X86 && PCI && WATCHDOG_CORE
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tristate "Intel Management Engine Interface"
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depends on X86 && PCI
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help
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The Intel Management Engine (Intel ME) provides Manageability,
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Security and Media services for system containing Intel chipsets.
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if selected /dev/mei misc device will be created.
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For more information see
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<http://software.intel.com/en-us/manageability/>
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config INTEL_MEI_ME
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bool "ME Enabled Intel Chipsets"
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depends on INTEL_MEI
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depends on X86 && PCI && WATCHDOG_CORE
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default y
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help
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MEI support for ME Enabled Intel chipsets.
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Supported Chipsets are:
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7 Series Chipset Family
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6 Series Chipset Family
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@ -24,5 +35,3 @@ config INTEL_MEI
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82Q33 Express
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82X38/X48 Express
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For more information see
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<http://software.intel.com/en-us/manageability/>
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@ -6,9 +6,9 @@ obj-$(CONFIG_INTEL_MEI) += mei.o
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mei-objs := init.o
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mei-objs += hbm.o
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mei-objs += interrupt.o
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mei-objs += hw-me.o
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mei-objs += client.o
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mei-objs += main.o
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mei-objs += amthif.o
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mei-objs += wd.o
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mei-objs += client.o
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mei-objs += pci-me.o
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mei-$(CONFIG_INTEL_MEI_ME) += pci-me.o
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mei-$(CONFIG_INTEL_MEI_ME) += hw-me.o
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@ -300,8 +300,8 @@ static int mei_amthif_send_cmd(struct mei_device *dev, struct mei_cl_cb *cb)
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if (ret && dev->mei_host_buffer_is_empty) {
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ret = 0;
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dev->mei_host_buffer_is_empty = false;
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if (cb->request_buffer.size > mei_hbuf_max_data(dev)) {
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mei_hdr.length = mei_hbuf_max_data(dev);
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if (cb->request_buffer.size > mei_hbuf_max_len(dev)) {
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mei_hdr.length = mei_hbuf_max_len(dev);
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mei_hdr.msg_complete = 0;
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} else {
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mei_hdr.length = cb->request_buffer.size;
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@ -583,7 +583,7 @@ int mei_amthif_irq_read(struct mei_device *dev, s32 *slots)
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dev->iamthif_msg_buf_index = 0;
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dev->iamthif_msg_buf_size = 0;
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dev->iamthif_stall_timer = MEI_IAMTHIF_STALL_TIMER;
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dev->mei_host_buffer_is_empty = mei_hbuf_is_empty(dev);
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dev->mei_host_buffer_is_empty = mei_hbuf_is_ready(dev);
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return 0;
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}
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@ -56,7 +56,7 @@ static inline void mei_reg_write(const struct mei_me_hw *hw,
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*
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* returns ME_CB_RW register value (u32)
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*/
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u32 mei_mecbrw_read(const struct mei_device *dev)
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static u32 mei_me_mecbrw_read(const struct mei_device *dev)
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{
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return mei_reg_read(to_me_hw(dev), ME_CB_RW);
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}
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@ -102,7 +102,7 @@ static inline void mei_hcsr_set(struct mei_me_hw *hw, u32 hcsr)
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*
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* @dev: mei device
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*/
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void mei_hw_config(struct mei_device *dev)
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static void mei_me_hw_config(struct mei_device *dev)
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{
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u32 hcsr = mei_hcsr_read(to_me_hw(dev));
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/* Doesn't change in runtime */
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@ -113,20 +113,19 @@ void mei_hw_config(struct mei_device *dev)
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*
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* @dev: the device structure
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*/
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void mei_clear_interrupts(struct mei_device *dev)
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static void mei_me_intr_clear(struct mei_device *dev)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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u32 hcsr = mei_hcsr_read(hw);
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if ((hcsr & H_IS) == H_IS)
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mei_reg_write(hw, H_CSR, hcsr);
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}
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/**
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* mei_enable_interrupts - enables mei device interrupts
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* mei_me_intr_enable - enables mei device interrupts
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*
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* @dev: the device structure
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*/
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void mei_enable_interrupts(struct mei_device *dev)
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static void mei_me_intr_enable(struct mei_device *dev)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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u32 hcsr = mei_hcsr_read(hw);
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@ -139,7 +138,7 @@ void mei_enable_interrupts(struct mei_device *dev)
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*
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* @dev: the device structure
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*/
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void mei_disable_interrupts(struct mei_device *dev)
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static void mei_me_intr_disable(struct mei_device *dev)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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u32 hcsr = mei_hcsr_read(hw);
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@ -148,12 +147,12 @@ void mei_disable_interrupts(struct mei_device *dev)
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}
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/**
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* mei_hw_reset - resets fw via mei csr register.
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* mei_me_hw_reset - resets fw via mei csr register.
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*
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* @dev: the device structure
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* @interrupts_enabled: if interrupt should be enabled after reset.
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*/
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void mei_hw_reset(struct mei_device *dev, bool intr_enable)
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static void mei_me_hw_reset(struct mei_device *dev, bool intr_enable)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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u32 hcsr = mei_hcsr_read(hw);
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@ -180,25 +179,25 @@ void mei_hw_reset(struct mei_device *dev, bool intr_enable)
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}
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/**
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* mei_host_set_ready - enable device
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* mei_me_host_set_ready - enable device
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*
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* @dev - mei device
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* returns bool
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*/
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void mei_host_set_ready(struct mei_device *dev)
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static void mei_me_host_set_ready(struct mei_device *dev)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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hw->host_hw_state |= H_IE | H_IG | H_RDY;
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mei_hcsr_set(hw, hw->host_hw_state);
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}
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/**
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* mei_host_is_ready - check whether the host has turned ready
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* mei_me_host_is_ready - check whether the host has turned ready
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*
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* @dev - mei device
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* returns bool
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*/
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bool mei_host_is_ready(struct mei_device *dev)
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static bool mei_me_host_is_ready(struct mei_device *dev)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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hw->host_hw_state = mei_hcsr_read(hw);
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@ -206,12 +205,12 @@ bool mei_host_is_ready(struct mei_device *dev)
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}
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/**
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* mei_me_is_ready - check whether the me has turned ready
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* mei_me_hw_is_ready - check whether the me(hw) has turned ready
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*
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* @dev - mei device
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* returns bool
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*/
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bool mei_me_is_ready(struct mei_device *dev)
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static bool mei_me_hw_is_ready(struct mei_device *dev)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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hw->me_hw_state = mei_mecsr_read(hw);
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@ -268,19 +267,19 @@ static unsigned char mei_hbuf_filled_slots(struct mei_device *dev)
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*
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* returns true if empty, false - otherwise.
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*/
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bool mei_hbuf_is_empty(struct mei_device *dev)
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static bool mei_me_hbuf_is_empty(struct mei_device *dev)
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{
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return mei_hbuf_filled_slots(dev) == 0;
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}
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/**
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* mei_hbuf_empty_slots - counts write empty slots.
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* mei_me_hbuf_empty_slots - counts write empty slots.
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*
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* @dev: the device structure
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*
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* returns -1(ESLOTS_OVERFLOW) if overflow, otherwise empty slots count
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*/
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int mei_hbuf_empty_slots(struct mei_device *dev)
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static int mei_me_hbuf_empty_slots(struct mei_device *dev)
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{
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unsigned char filled_slots, empty_slots;
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@ -294,6 +293,12 @@ int mei_hbuf_empty_slots(struct mei_device *dev)
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return empty_slots;
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}
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static size_t mei_me_hbuf_max_len(const struct mei_device *dev)
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{
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return dev->hbuf_depth * sizeof(u32) - sizeof(struct mei_msg_hdr);
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}
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/**
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* mei_write_message - writes a message to mei device.
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*
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@ -303,8 +308,9 @@ int mei_hbuf_empty_slots(struct mei_device *dev)
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*
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* This function returns -EIO if write has failed
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*/
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int mei_write_message(struct mei_device *dev, struct mei_msg_hdr *header,
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unsigned char *buf)
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static int mei_me_write_message(struct mei_device *dev,
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struct mei_msg_hdr *header,
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unsigned char *buf)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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unsigned long rem, dw_cnt;
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@ -337,20 +343,20 @@ int mei_write_message(struct mei_device *dev, struct mei_msg_hdr *header,
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hcsr = mei_hcsr_read(hw) | H_IG;
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mei_hcsr_set(hw, hcsr);
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if (!mei_me_is_ready(dev))
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if (!mei_me_hw_is_ready(dev))
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return -EIO;
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return 0;
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}
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/**
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* mei_count_full_read_slots - counts read full slots.
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* mei_me_count_full_read_slots - counts read full slots.
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*
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* @dev: the device structure
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*
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* returns -1(ESLOTS_OVERFLOW) if overflow, otherwise filled slots count
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*/
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int mei_count_full_read_slots(struct mei_device *dev)
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static int mei_me_count_full_read_slots(struct mei_device *dev)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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char read_ptr, write_ptr;
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@ -371,13 +377,13 @@ int mei_count_full_read_slots(struct mei_device *dev)
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}
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/**
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* mei_read_slots - reads a message from mei device.
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* mei_me_read_slots - reads a message from mei device.
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*
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* @dev: the device structure
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* @buffer: message buffer will be written
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* @buffer_length: message size will be read
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*/
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void mei_read_slots(struct mei_device *dev, unsigned char *buffer,
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static int mei_me_read_slots(struct mei_device *dev, unsigned char *buffer,
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unsigned long buffer_length)
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{
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struct mei_me_hw *hw = to_me_hw(dev);
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@ -385,17 +391,42 @@ void mei_read_slots(struct mei_device *dev, unsigned char *buffer,
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u32 hcsr;
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for (; buffer_length >= sizeof(u32); buffer_length -= sizeof(u32))
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*reg_buf++ = mei_mecbrw_read(dev);
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*reg_buf++ = mei_me_mecbrw_read(dev);
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if (buffer_length > 0) {
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u32 reg = mei_mecbrw_read(dev);
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u32 reg = mei_me_mecbrw_read(dev);
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memcpy(reg_buf, ®, buffer_length);
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}
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hcsr = mei_hcsr_read(hw) | H_IG;
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mei_hcsr_set(hw, hcsr);
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return 0;
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}
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static const struct mei_hw_ops mei_me_hw_ops = {
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.host_set_ready = mei_me_host_set_ready,
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.host_is_ready = mei_me_host_is_ready,
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.hw_is_ready = mei_me_hw_is_ready,
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.hw_reset = mei_me_hw_reset,
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.hw_config = mei_me_hw_config,
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.intr_clear = mei_me_intr_clear,
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.intr_enable = mei_me_intr_enable,
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.intr_disable = mei_me_intr_disable,
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.hbuf_free_slots = mei_me_hbuf_empty_slots,
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.hbuf_is_ready = mei_me_hbuf_is_empty,
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.hbuf_max_len = mei_me_hbuf_max_len,
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.write = mei_me_write_message,
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.rdbuf_full_slots = mei_me_count_full_read_slots,
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.read_hdr = mei_me_mecbrw_read,
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.read = mei_me_read_slots
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};
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/**
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* init_mei_device - allocates and initializes the mei device structure
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*
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@ -422,6 +453,8 @@ struct mei_device *mei_me_dev_init(struct pci_dev *pdev)
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INIT_DELAYED_WORK(&dev->timer_work, mei_timer);
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INIT_WORK(&dev->init_work, mei_host_client_init);
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dev->ops = &mei_me_hw_ops;
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dev->pdev = pdev;
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return dev;
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}
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@ -36,29 +36,10 @@ struct mei_me_hw {
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struct mei_device *mei_me_dev_init(struct pci_dev *pdev);
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void mei_read_slots(struct mei_device *dev,
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unsigned char *buffer,
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unsigned long buffer_length);
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int mei_write_message(struct mei_device *dev,
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struct mei_msg_hdr *header,
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unsigned char *buf);
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bool mei_hbuf_is_empty(struct mei_device *dev);
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int mei_hbuf_empty_slots(struct mei_device *dev);
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static inline size_t mei_hbuf_max_data(const struct mei_device *dev)
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{
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return dev->hbuf_depth * sizeof(u32) - sizeof(struct mei_msg_hdr);
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}
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/* get slots (dwords) from a message length + header (bytes) */
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static inline unsigned char mei_data2slots(size_t length)
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{
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return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, 4);
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}
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int mei_count_full_read_slots(struct mei_device *dev);
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#endif /* _MEI_INTERFACE_H_ */
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@ -104,7 +104,7 @@ int mei_hw_init(struct mei_device *dev)
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goto err;
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}
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if (!mei_me_is_ready(dev)) {
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if (!mei_hw_is_ready(dev)) {
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dev_err(&dev->pdev->dev, "ME is not ready.\n");
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goto err;
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}
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@ -329,7 +329,7 @@ static int mei_irq_thread_read_handler(struct mei_cl_cb *cmpl_list,
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int ret = 0;
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if (!dev->rd_msg_hdr) {
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dev->rd_msg_hdr = mei_mecbrw_read(dev);
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dev->rd_msg_hdr = mei_read_hdr(dev);
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dev_dbg(&dev->pdev->dev, "slots =%08x.\n", *slots);
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(*slots)--;
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dev_dbg(&dev->pdev->dev, "slots =%08x.\n", *slots);
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@ -430,7 +430,7 @@ static int mei_irq_thread_write_handler(struct mei_device *dev,
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s32 slots;
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int ret;
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if (!mei_hbuf_is_empty(dev)) {
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if (!mei_hbuf_is_ready(dev)) {
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dev_dbg(&dev->pdev->dev, "host buffer is not empty.\n");
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return 0;
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}
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@ -698,7 +698,7 @@ irqreturn_t mei_interrupt_thread_handler(int irq, void *dev_id)
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mei_clear_interrupts(dev);
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/* check if ME wants a reset */
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if (!mei_me_is_ready(dev) &&
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if (!mei_hw_is_ready(dev) &&
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dev->dev_state != MEI_DEV_RESETING &&
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dev->dev_state != MEI_DEV_INITIALIZING) {
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dev_dbg(&dev->pdev->dev, "FW not ready.\n");
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@ -709,7 +709,7 @@ irqreturn_t mei_interrupt_thread_handler(int irq, void *dev_id)
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/* check if we need to start the dev */
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if (!mei_host_is_ready(dev)) {
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if (mei_me_is_ready(dev)) {
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if (mei_hw_is_ready(dev)) {
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dev_dbg(&dev->pdev->dev, "we need to start the dev.\n");
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mei_host_set_ready(dev);
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@ -743,7 +743,7 @@ irqreturn_t mei_interrupt_thread_handler(int irq, void *dev_id)
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rets = mei_irq_thread_write_handler(dev, &complete_list);
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end:
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dev_dbg(&dev->pdev->dev, "end of bottom half function.\n");
|
||||
dev->mei_host_buffer_is_empty = mei_hbuf_is_empty(dev);
|
||||
dev->mei_host_buffer_is_empty = mei_hbuf_is_ready(dev);
|
||||
|
||||
bus_message_received = false;
|
||||
if (dev->recvd_msg && waitqueue_active(&dev->wait_recvd_msg)) {
|
||||
|
|
|
|||
|
|
@ -462,8 +462,8 @@ static ssize_t mei_write(struct file *file, const char __user *ubuf,
|
|||
}
|
||||
|
||||
dev->mei_host_buffer_is_empty = false;
|
||||
if (length > mei_hbuf_max_data(dev)) {
|
||||
mei_hdr.length = mei_hbuf_max_data(dev);
|
||||
if (length > mei_hbuf_max_len(dev)) {
|
||||
mei_hdr.length = mei_hbuf_max_len(dev);
|
||||
mei_hdr.msg_complete = 0;
|
||||
} else {
|
||||
mei_hdr.length = length;
|
||||
|
|
@ -765,4 +765,5 @@ void mei_deregister(void)
|
|||
mei_misc_device.parent = NULL;
|
||||
}
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
||||
|
|
|
|||
|
|
@ -211,6 +211,58 @@ struct mei_cl {
|
|||
struct mei_cl_cb *read_cb;
|
||||
};
|
||||
|
||||
/** struct mei_hw_ops
|
||||
*
|
||||
* @host_set_ready - notify FW that host side is ready
|
||||
* @host_is_ready - query for host readiness
|
||||
|
||||
* @hw_is_ready - query if hw is ready
|
||||
* @hw_reset - reset hw
|
||||
* @hw_config - configure hw
|
||||
|
||||
* @intr_clear - clear pending interrupts
|
||||
* @intr_enable - enable interrupts
|
||||
* @intr_disable - disable interrupts
|
||||
|
||||
* @hbuf_free_slots - query for write buffer empty slots
|
||||
* @hbuf_is_ready - query if write buffer is empty
|
||||
* @hbuf_max_len - query for write buffer max len
|
||||
|
||||
* @write - write a message to FW
|
||||
|
||||
* @rdbuf_full_slots - query how many slots are filled
|
||||
|
||||
* @read_hdr - get first 4 bytes (header)
|
||||
* @read - read a buffer from the FW
|
||||
*/
|
||||
struct mei_hw_ops {
|
||||
|
||||
void (*host_set_ready) (struct mei_device *dev);
|
||||
bool (*host_is_ready) (struct mei_device *dev);
|
||||
|
||||
bool (*hw_is_ready) (struct mei_device *dev);
|
||||
void (*hw_reset) (struct mei_device *dev, bool enable);
|
||||
void (*hw_config) (struct mei_device *dev);
|
||||
|
||||
void (*intr_clear) (struct mei_device *dev);
|
||||
void (*intr_enable) (struct mei_device *dev);
|
||||
void (*intr_disable) (struct mei_device *dev);
|
||||
|
||||
int (*hbuf_free_slots) (struct mei_device *dev);
|
||||
bool (*hbuf_is_ready) (struct mei_device *dev);
|
||||
size_t (*hbuf_max_len) (const struct mei_device *dev);
|
||||
|
||||
int (*write)(struct mei_device *dev,
|
||||
struct mei_msg_hdr *hdr,
|
||||
unsigned char *buf);
|
||||
|
||||
int (*rdbuf_full_slots)(struct mei_device *dev);
|
||||
|
||||
u32 (*read_hdr)(const struct mei_device *dev);
|
||||
int (*read) (struct mei_device *dev,
|
||||
unsigned char *buf, unsigned long len);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct mei_device - MEI private device struct
|
||||
* @mem_addr - mem mapped base register address
|
||||
|
|
@ -306,6 +358,8 @@ struct mei_device {
|
|||
bool iamthif_canceled;
|
||||
|
||||
struct work_struct init_work;
|
||||
|
||||
const struct mei_hw_ops *ops;
|
||||
char hw[0] __aligned(sizeof(void *));
|
||||
};
|
||||
|
||||
|
|
@ -376,26 +430,84 @@ void mei_watchdog_register(struct mei_device *dev);
|
|||
*/
|
||||
void mei_watchdog_unregister(struct mei_device *dev);
|
||||
|
||||
|
||||
/*
|
||||
* Register Access Function
|
||||
*/
|
||||
|
||||
void mei_hw_config(struct mei_device *dev);
|
||||
void mei_hw_reset(struct mei_device *dev, bool intr_enable);
|
||||
u32 mei_mecbrw_read(const struct mei_device *dev);
|
||||
static inline void mei_hw_config(struct mei_device *dev)
|
||||
{
|
||||
dev->ops->hw_config(dev);
|
||||
}
|
||||
static inline void mei_hw_reset(struct mei_device *dev, bool enable)
|
||||
{
|
||||
dev->ops->hw_reset(dev, enable);
|
||||
}
|
||||
|
||||
static inline void mei_clear_interrupts(struct mei_device *dev)
|
||||
{
|
||||
dev->ops->intr_clear(dev);
|
||||
}
|
||||
|
||||
static inline void mei_enable_interrupts(struct mei_device *dev)
|
||||
{
|
||||
dev->ops->intr_enable(dev);
|
||||
}
|
||||
|
||||
void mei_clear_interrupts(struct mei_device *dev);
|
||||
void mei_enable_interrupts(struct mei_device *dev);
|
||||
void mei_disable_interrupts(struct mei_device *dev);
|
||||
static inline void mei_disable_interrupts(struct mei_device *dev)
|
||||
{
|
||||
dev->ops->intr_disable(dev);
|
||||
}
|
||||
|
||||
void mei_host_set_ready(struct mei_device *dev);
|
||||
bool mei_host_is_ready(struct mei_device *dev);
|
||||
bool mei_me_is_ready(struct mei_device *dev);
|
||||
static inline void mei_host_set_ready(struct mei_device *dev)
|
||||
{
|
||||
dev->ops->host_set_ready(dev);
|
||||
}
|
||||
static inline bool mei_host_is_ready(struct mei_device *dev)
|
||||
{
|
||||
return dev->ops->host_is_ready(dev);
|
||||
}
|
||||
static inline bool mei_hw_is_ready(struct mei_device *dev)
|
||||
{
|
||||
return dev->ops->hw_is_ready(dev);
|
||||
}
|
||||
|
||||
static inline bool mei_hbuf_is_ready(struct mei_device *dev)
|
||||
{
|
||||
return dev->ops->hbuf_is_ready(dev);
|
||||
}
|
||||
|
||||
static inline int mei_hbuf_empty_slots(struct mei_device *dev)
|
||||
{
|
||||
return dev->ops->hbuf_free_slots(dev);
|
||||
}
|
||||
|
||||
static inline size_t mei_hbuf_max_len(const struct mei_device *dev)
|
||||
{
|
||||
return dev->ops->hbuf_max_len(dev);
|
||||
}
|
||||
|
||||
static inline int mei_write_message(struct mei_device *dev,
|
||||
struct mei_msg_hdr *hdr,
|
||||
unsigned char *buf)
|
||||
{
|
||||
return dev->ops->write(dev, hdr, buf);
|
||||
}
|
||||
|
||||
static inline u32 mei_read_hdr(const struct mei_device *dev)
|
||||
{
|
||||
return dev->ops->read_hdr(dev);
|
||||
}
|
||||
|
||||
static inline void mei_read_slots(struct mei_device *dev,
|
||||
unsigned char *buf, unsigned long len)
|
||||
{
|
||||
dev->ops->read(dev, buf, len);
|
||||
}
|
||||
|
||||
static inline int mei_count_full_read_slots(struct mei_device *dev)
|
||||
{
|
||||
return dev->ops->rdbuf_full_slots(dev);
|
||||
}
|
||||
|
||||
int mei_register(struct device *dev);
|
||||
void mei_deregister(void);
|
||||
|
|
|
|||
Loading…
Reference in New Issue