mtd: denali: fix indents and other trivial things
- Fix indents - Do not break a line unless it is longer than 80 columns - Do not insert a whitespace before ';' - Use whitespaces around operators - Use braces for a "else" block where the "if" block uses ones. Besides, eliminate all the warnings reported by checkpatch.pl: - WARNING: quoted string split across lines - WARNING: else is not generally useful after a break or return - WARNING: Missing a blank line after declarations - WARNING: Avoid line continuations in quoted strings Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
Masahiro Yamada
Brian Norris
parent
7d14ecd050
commit
8125450cd8
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@ -37,8 +37,8 @@ MODULE_LICENSE("GPL");
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static int onfi_timing_mode = NAND_DEFAULT_TIMINGS;
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module_param(onfi_timing_mode, int, S_IRUGO);
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MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
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" -1 indicates use default timings");
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MODULE_PARM_DESC(onfi_timing_mode,
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"Overrides default ONFI setting. -1 indicates use default timings");
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#define DENALI_NAND_NAME "denali-nand"
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@ -162,8 +162,7 @@ static void read_status(struct denali_nand_info *denali)
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static void reset_bank(struct denali_nand_info *denali)
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{
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uint32_t irq_status;
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uint32_t irq_mask = INTR_STATUS__RST_COMP |
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INTR_STATUS__TIME_OUT;
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uint32_t irq_mask = INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT;
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clear_interrupts(denali);
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@ -181,16 +180,15 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
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int i;
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dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
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__FILE__, __LINE__, __func__);
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__FILE__, __LINE__, __func__);
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for (i = 0 ; i < denali->max_banks; i++)
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for (i = 0; i < denali->max_banks; i++)
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iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
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denali->flash_reg + INTR_STATUS(i));
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for (i = 0 ; i < denali->max_banks; i++) {
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for (i = 0; i < denali->max_banks; i++) {
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iowrite32(1 << i, denali->flash_reg + DEVICE_RESET);
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while (!(ioread32(denali->flash_reg +
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INTR_STATUS(i)) &
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while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) &
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(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT)))
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cpu_relax();
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if (ioread32(denali->flash_reg + INTR_STATUS(i)) &
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@ -201,7 +199,7 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
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for (i = 0; i < denali->max_banks; i++)
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iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
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denali->flash_reg + INTR_STATUS(i));
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denali->flash_reg + INTR_STATUS(i));
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return PASS;
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}
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@ -235,7 +233,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
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uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt;
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dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
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__FILE__, __LINE__, __func__);
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__FILE__, __LINE__, __func__);
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en_lo = CEIL_DIV(Trp[mode], CLK_X);
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en_hi = CEIL_DIV(Treh[mode], CLK_X);
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@ -255,9 +253,8 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
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data_invalid_rloh = (en_lo + en_hi) * CLK_X + Trloh[mode];
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data_invalid =
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data_invalid_rhoh <
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data_invalid_rloh ? data_invalid_rhoh : data_invalid_rloh;
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data_invalid = data_invalid_rhoh < data_invalid_rloh ?
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data_invalid_rhoh : data_invalid_rloh;
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dv_window = data_invalid - Trea[mode];
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@ -272,7 +269,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
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if (data_invalid - acc_clks * CLK_X < 2)
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dev_warn(denali->dev, "%s, Line %d: Warning!\n",
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__FILE__, __LINE__);
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__FILE__, __LINE__);
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addr_2_data = CEIL_DIV(Tadl[mode], CLK_X);
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re_2_we = CEIL_DIV(Trhw[mode], CLK_X);
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@ -406,9 +403,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
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break;
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default:
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dev_warn(denali->dev,
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"Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
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"Will use default parameter values instead.\n",
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device_id);
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"Spectra: Unknown Hynix NAND (Device ID: 0x%x).\n"
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"Will use default parameter values instead.\n",
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device_id);
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}
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}
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@ -425,8 +422,7 @@ static void find_valid_banks(struct denali_nand_info *denali)
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for (i = 0; i < denali->max_banks; i++) {
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index_addr(denali, MODE_11 | (i << 24) | 0, 0x90);
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index_addr(denali, MODE_11 | (i << 24) | 1, 0);
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index_addr_read_data(denali,
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MODE_11 | (i << 24) | 2, &id[i]);
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index_addr_read_data(denali, MODE_11 | (i << 24) | 2, &id[i]);
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dev_dbg(denali->dev,
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"Return 1st ID for bank[%d]: %x\n", i, id[i]);
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@ -450,8 +446,7 @@ static void find_valid_banks(struct denali_nand_info *denali)
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*/
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if (denali->total_used_banks != 1) {
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dev_err(denali->dev,
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"Sorry, Intel CE4100 only supports "
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"a single NAND device.\n");
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"Sorry, Intel CE4100 only supports a single NAND device.\n");
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BUG();
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}
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}
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@ -489,10 +484,12 @@ static void detect_partition_feature(struct denali_nand_info *denali)
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+
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(ioread32(denali->flash_reg + MIN_BLK_ADDR(1)) &
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MIN_BLK_ADDR__VALUE);
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} else
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} else {
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denali->fwblks = SPECTRA_START_BLOCK;
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} else
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}
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} else {
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denali->fwblks = SPECTRA_START_BLOCK;
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}
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}
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static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
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@ -502,8 +499,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
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uint8_t maf_id, device_id;
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int i;
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dev_dbg(denali->dev,
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"%s, Line %d, Function: %s\n",
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dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
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__FILE__, __LINE__, __func__);
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/*
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@ -532,7 +528,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
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}
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dev_info(denali->dev,
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"Dump timing register values:"
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"Dump timing register values:\n"
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"acc_clks: %d, re_2_we: %d, re_2_re: %d\n"
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"we_2_re: %d, addr_2_data: %d, rdwr_en_lo_cnt: %d\n"
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"rdwr_en_hi_cnt: %d, cs_setup_cnt: %d\n",
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@ -563,7 +559,7 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
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uint16_t INT_ENABLE)
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{
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dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
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__FILE__, __LINE__, __func__);
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__FILE__, __LINE__, __func__);
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if (INT_ENABLE)
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iowrite32(1, denali->flash_reg + GLOBAL_INT_ENABLE);
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@ -710,13 +706,13 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
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spin_unlock_irq(&denali->irq_lock);
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/* our interrupt was detected */
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break;
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} else {
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/*
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* these are not the interrupts you are looking for -
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* need to wait again
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*/
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spin_unlock_irq(&denali->irq_lock);
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}
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/*
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* these are not the interrupts you are looking for -
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* need to wait again
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*/
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spin_unlock_irq(&denali->irq_lock);
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} while (comp_res != 0);
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if (comp_res == 0) {
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@ -744,8 +740,7 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
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/* Enable spare area/ECC per user's request. */
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iowrite32(ecc_en_flag, denali->flash_reg + ECC_ENABLE);
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iowrite32(transfer_spare_flag,
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denali->flash_reg + TRANSFER_SPARE_REG);
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iowrite32(transfer_spare_flag, denali->flash_reg + TRANSFER_SPARE_REG);
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}
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/*
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@ -753,10 +748,8 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
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* controller's user guide for more information (section 4.2.3.6).
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*/
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static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
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bool ecc_en,
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bool transfer_spare,
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int access_type,
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int op)
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bool ecc_en, bool transfer_spare,
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int access_type, int op)
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{
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int status = PASS;
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uint32_t page_count = 1;
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@ -811,9 +804,8 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
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if (irq_status == 0) {
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dev_err(denali->dev,
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"cmd, page, addr on timeout "
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"(0x%x, 0x%x, 0x%x)\n",
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cmd, denali->page, addr);
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"cmd, page, addr on timeout (0x%x, 0x%x, 0x%x)\n",
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cmd, denali->page, addr);
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status = FAIL;
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} else {
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cmd = MODE_01 | addr;
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@ -826,8 +818,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
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/* helper function that simply writes a buffer to the flash */
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static int write_data_to_flash_mem(struct denali_nand_info *denali,
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const uint8_t *buf,
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int len)
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const uint8_t *buf, int len)
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{
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uint32_t *buf32;
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int i;
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@ -842,13 +833,12 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
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buf32 = (uint32_t *)buf;
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for (i = 0; i < len / 4; i++)
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iowrite32(*buf32++, denali->flash_mem + 0x10);
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return i*4; /* intent is to return the number of bytes read */
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return i * 4; /* intent is to return the number of bytes read */
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}
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/* helper function that simply reads a buffer from the flash */
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static int read_data_from_flash_mem(struct denali_nand_info *denali,
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uint8_t *buf,
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int len)
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uint8_t *buf, int len)
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{
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uint32_t *buf32;
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int i;
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@ -865,7 +855,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
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buf32 = (uint32_t *)buf;
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for (i = 0; i < len / 4; i++)
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*buf32++ = ioread32(denali->flash_mem + 0x10);
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return i*4; /* intent is to return the number of bytes read */
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return i * 4; /* intent is to return the number of bytes read */
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}
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/* writes OOB data to the device */
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@ -941,6 +931,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
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static bool is_erased(uint8_t *buf, int len)
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{
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int i;
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for (i = 0; i < len; i++)
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if (buf[i] != 0xFF)
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return false;
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@ -990,6 +981,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
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*/
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if (err_byte < ECC_SECTOR_SIZE) {
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int offset;
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offset = (err_sector *
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ECC_SECTOR_SIZE +
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err_byte) *
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@ -1063,10 +1055,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
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const uint8_t *buf, bool raw_xfer)
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{
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struct denali_nand_info *denali = mtd_to_denali(mtd);
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dma_addr_t addr = denali->buf.dma_buf;
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size_t size = denali->mtd.writesize + denali->mtd.oobsize;
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uint32_t irq_status;
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uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
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INTR_STATUS__PROGRAM_FAIL;
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@ -1099,9 +1089,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
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irq_status = wait_for_irq(denali, irq_mask);
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if (irq_status == 0) {
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dev_err(denali->dev,
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"timeout on write_page (type = %d)\n",
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raw_xfer);
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dev_err(denali->dev, "timeout on write_page (type = %d)\n",
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raw_xfer);
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denali->status = NAND_STATUS_FAIL;
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}
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@ -1172,9 +1161,9 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
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bool check_erased_page = false;
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if (page != denali->page) {
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dev_err(denali->dev, "IN %s: page %d is not"
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" equal to denali->page %d, investigate!!",
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__func__, page, denali->page);
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dev_err(denali->dev,
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"IN %s: page %d is not equal to denali->page %d",
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__func__, page, denali->page);
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BUG();
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}
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@ -1214,16 +1203,14 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
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uint8_t *buf, int oob_required, int page)
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{
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struct denali_nand_info *denali = mtd_to_denali(mtd);
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dma_addr_t addr = denali->buf.dma_buf;
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size_t size = denali->mtd.writesize + denali->mtd.oobsize;
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uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP;
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if (page != denali->page) {
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dev_err(denali->dev, "IN %s: page %d is not"
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" equal to denali->page %d, investigate!!",
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__func__, page, denali->page);
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dev_err(denali->dev,
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"IN %s: page %d is not equal to denali->page %d",
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__func__, page, denali->page);
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BUG();
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}
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@ -1272,6 +1259,7 @@ static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)
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{
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struct denali_nand_info *denali = mtd_to_denali(mtd);
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int status = denali->status;
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denali->status = 0;
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return status;
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@ -1321,9 +1309,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
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index_addr(denali, addr | 0, 0x90);
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index_addr(denali, addr | 1, 0);
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for (i = 0; i < 8; i++) {
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index_addr_read_data(denali,
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addr | 2,
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&id);
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index_addr_read_data(denali, addr | 2, &id);
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write_byte_to_buf(denali, id);
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}
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break;
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@ -1348,8 +1334,8 @@ static int denali_ecc_calculate(struct mtd_info *mtd, const uint8_t *data,
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uint8_t *ecc_code)
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{
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struct denali_nand_info *denali = mtd_to_denali(mtd);
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dev_err(denali->dev,
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"denali_ecc_calculate called unexpectedly\n");
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dev_err(denali->dev, "denali_ecc_calculate called unexpectedly\n");
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BUG();
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return -EIO;
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}
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@ -1358,8 +1344,8 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data,
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uint8_t *read_ecc, uint8_t *calc_ecc)
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{
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struct denali_nand_info *denali = mtd_to_denali(mtd);
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dev_err(denali->dev,
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"denali_ecc_correct called unexpectedly\n");
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dev_err(denali->dev, "denali_ecc_correct called unexpectedly\n");
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BUG();
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return -EIO;
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}
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@ -1367,8 +1353,8 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data,
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static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
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{
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struct denali_nand_info *denali = mtd_to_denali(mtd);
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dev_err(denali->dev,
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"denali_ecc_hwctl called unexpectedly\n");
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dev_err(denali->dev, "denali_ecc_hwctl called unexpectedly\n");
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BUG();
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}
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/* end NAND core entry points */
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@ -1596,8 +1582,7 @@ int denali_init(struct denali_nand_info *denali)
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} else if (denali->mtd.oobsize < (denali->bbtskipbytes +
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ECC_8BITS * (denali->mtd.writesize /
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ECC_SECTOR_SIZE))) {
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pr_err("Your NAND chip OOB is not large enough to \
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contain 8bit ECC correction codes");
|
||||
pr_err("Your NAND chip OOB is not large enough to contain 8bit ECC correction codes");
|
||||
goto failed_req_irq;
|
||||
} else {
|
||||
denali->nand.ecc.strength = 8;
|
||||
|
|
@ -1621,8 +1606,7 @@ int denali_init(struct denali_nand_info *denali)
|
|||
* contained by each nand chip. blksperchip will help driver to
|
||||
* know how many blocks is taken by FW.
|
||||
*/
|
||||
denali->totalblks = denali->mtd.size >>
|
||||
denali->nand.phys_erase_shift;
|
||||
denali->totalblks = denali->mtd.size >> denali->nand.phys_erase_shift;
|
||||
denali->blksperchip = denali->totalblks / denali->nand.numchips;
|
||||
|
||||
/*
|
||||
|
|
@ -1669,7 +1653,7 @@ void denali_remove(struct denali_nand_info *denali)
|
|||
{
|
||||
denali_irq_cleanup(denali->irq, denali);
|
||||
dma_unmap_single(denali->dev, denali->buf.dma_buf,
|
||||
denali->mtd.writesize + denali->mtd.oobsize,
|
||||
DMA_BIDIRECTIONAL);
|
||||
denali->mtd.writesize + denali->mtd.oobsize,
|
||||
DMA_BIDIRECTIONAL);
|
||||
}
|
||||
EXPORT_SYMBOL(denali_remove);
|
||||
|
|
|
|||
Loading…
Reference in New Issue