include/asm-x86/cmpxchg_32.h: checkpatch cleanups - formatting only
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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3d3c6e1003
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8121019cad
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@ -8,9 +8,12 @@
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* you need to test for the feature in boot_cpu_data.
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*/
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#define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
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#define xchg(ptr, v) \
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((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), sizeof(*(ptr))))
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struct __xchg_dummy { unsigned long a[100]; };
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struct __xchg_dummy {
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unsigned long a[100];
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};
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#define __xg(x) ((struct __xchg_dummy *)(x))
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/*
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@ -27,11 +30,10 @@ struct __xchg_dummy { unsigned long a[100]; };
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* of the instruction set reference 24319102.pdf. We need
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* the reader side to see the coherent 64bit value.
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*/
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static inline void __set_64bit (unsigned long long * ptr,
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static inline void __set_64bit(unsigned long long *ptr,
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unsigned int low, unsigned int high)
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{
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__asm__ __volatile__ (
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"\n1:\t"
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asm volatile("\n1:\t"
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"movl (%0), %%eax\n\t"
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"movl 4(%0), %%edx\n\t"
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LOCK_PREFIX "cmpxchg8b (%0)\n\t"
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@ -40,58 +42,61 @@ static inline void __set_64bit (unsigned long long * ptr,
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: "D"(ptr),
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"b"(low),
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"c"(high)
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: "ax","dx","memory");
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: "ax", "dx", "memory");
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}
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static inline void __set_64bit_constant (unsigned long long *ptr,
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static inline void __set_64bit_constant(unsigned long long *ptr,
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unsigned long long value)
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{
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__set_64bit(ptr,(unsigned int)(value), (unsigned int)((value)>>32ULL));
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__set_64bit(ptr, (unsigned int)value, (unsigned int)(value >> 32));
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}
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#define ll_low(x) *(((unsigned int*)&(x))+0)
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#define ll_high(x) *(((unsigned int*)&(x))+1)
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static inline void __set_64bit_var (unsigned long long *ptr,
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#define ll_low(x) *(((unsigned int *)&(x)) + 0)
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#define ll_high(x) *(((unsigned int *)&(x)) + 1)
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static inline void __set_64bit_var(unsigned long long *ptr,
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unsigned long long value)
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{
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__set_64bit(ptr,ll_low(value), ll_high(value));
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__set_64bit(ptr, ll_low(value), ll_high(value));
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}
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#define set_64bit(ptr,value) \
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(__builtin_constant_p(value) ? \
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__set_64bit_constant(ptr, value) : \
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__set_64bit_var(ptr, value) )
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#define set_64bit(ptr, value) \
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(__builtin_constant_p((value)) \
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? __set_64bit_constant((ptr), (value)) \
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: __set_64bit_var((ptr), (value)))
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#define _set_64bit(ptr,value) \
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(__builtin_constant_p(value) ? \
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__set_64bit(ptr, (unsigned int)(value), (unsigned int)((value)>>32ULL) ) : \
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__set_64bit(ptr, ll_low(value), ll_high(value)) )
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#define _set_64bit(ptr, value) \
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(__builtin_constant_p(value) \
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? __set_64bit(ptr, (unsigned int)(value), \
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(unsigned int)((value) >> 32)) \
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: __set_64bit(ptr, ll_low((value)), ll_high((value))))
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/*
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* Note: no "lock" prefix even on SMP: xchg always implies lock anyway
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* Note 2: xchg has side effect, so that attribute volatile is necessary,
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* but generally the primitive is invalid, *ptr is output argument. --ANK
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*/
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static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
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static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
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int size)
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{
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switch (size) {
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case 1:
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__asm__ __volatile__("xchgb %b0,%1"
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:"=q" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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asm volatile("xchgb %b0,%1"
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: "=q" (x)
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: "m" (*__xg(ptr)), "0" (x)
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: "memory");
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break;
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case 2:
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__asm__ __volatile__("xchgw %w0,%1"
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:"=r" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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asm volatile("xchgw %w0,%1"
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: "=r" (x)
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: "m" (*__xg(ptr)), "0" (x)
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: "memory");
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break;
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case 4:
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__asm__ __volatile__("xchgl %0,%1"
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:"=r" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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asm volatile("xchgl %0,%1"
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: "=r" (x)
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: "m" (*__xg(ptr)), "0" (x)
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: "memory");
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break;
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}
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return x;
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@ -107,13 +112,16 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
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#define __HAVE_ARCH_CMPXCHG 1
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#define cmpxchg(ptr, o, n) \
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((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
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(unsigned long)(n), sizeof(*(ptr))))
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(unsigned long)(n), \
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sizeof(*(ptr))))
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#define sync_cmpxchg(ptr, o, n) \
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((__typeof__(*(ptr)))__sync_cmpxchg((ptr), (unsigned long)(o), \
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(unsigned long)(n), sizeof(*(ptr))))
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(unsigned long)(n), \
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sizeof(*(ptr))))
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#define cmpxchg_local(ptr, o, n) \
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((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
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(unsigned long)(n), sizeof(*(ptr))))
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(unsigned long)(n), \
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sizeof(*(ptr))))
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#endif
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#ifdef CONFIG_X86_CMPXCHG64
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@ -121,7 +129,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
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((__typeof__(*(ptr)))__cmpxchg64((ptr), (unsigned long long)(o), \
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(unsigned long long)(n)))
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#define cmpxchg64_local(ptr, o, n) \
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((__typeof__(*(ptr)))__cmpxchg64_local((ptr), (unsigned long long)(o),\
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((__typeof__(*(ptr)))__cmpxchg64_local((ptr), (unsigned long long)(o), \
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(unsigned long long)(n)))
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#endif
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@ -131,19 +139,19 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
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unsigned long prev;
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switch (size) {
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case 1:
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__asm__ __volatile__(LOCK_PREFIX "cmpxchgb %b1,%2"
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asm volatile(LOCK_PREFIX "cmpxchgb %b1,%2"
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: "=a"(prev)
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: "q"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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return prev;
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case 2:
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__asm__ __volatile__(LOCK_PREFIX "cmpxchgw %w1,%2"
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asm volatile(LOCK_PREFIX "cmpxchgw %w1,%2"
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: "=a"(prev)
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: "r"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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return prev;
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case 4:
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__asm__ __volatile__(LOCK_PREFIX "cmpxchgl %1,%2"
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asm volatile(LOCK_PREFIX "cmpxchgl %1,%2"
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: "=a"(prev)
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: "r"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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@ -164,19 +172,19 @@ static inline unsigned long __sync_cmpxchg(volatile void *ptr,
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unsigned long prev;
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switch (size) {
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case 1:
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__asm__ __volatile__("lock; cmpxchgb %b1,%2"
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asm volatile("lock; cmpxchgb %b1,%2"
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: "=a"(prev)
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: "q"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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return prev;
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case 2:
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__asm__ __volatile__("lock; cmpxchgw %w1,%2"
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asm volatile("lock; cmpxchgw %w1,%2"
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: "=a"(prev)
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: "r"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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return prev;
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case 4:
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__asm__ __volatile__("lock; cmpxchgl %1,%2"
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asm volatile("lock; cmpxchgl %1,%2"
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: "=a"(prev)
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: "r"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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@ -186,24 +194,25 @@ static inline unsigned long __sync_cmpxchg(volatile void *ptr,
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}
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static inline unsigned long __cmpxchg_local(volatile void *ptr,
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unsigned long old, unsigned long new, int size)
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unsigned long old,
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unsigned long new, int size)
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{
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unsigned long prev;
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switch (size) {
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case 1:
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__asm__ __volatile__("cmpxchgb %b1,%2"
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asm volatile("cmpxchgb %b1,%2"
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: "=a"(prev)
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: "q"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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return prev;
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case 2:
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__asm__ __volatile__("cmpxchgw %w1,%2"
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asm volatile("cmpxchgw %w1,%2"
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: "=a"(prev)
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: "r"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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return prev;
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case 4:
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__asm__ __volatile__("cmpxchgl %1,%2"
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asm volatile("cmpxchgl %1,%2"
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: "=a"(prev)
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: "r"(new), "m"(*__xg(ptr)), "0"(old)
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: "memory");
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@ -213,10 +222,11 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
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}
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static inline unsigned long long __cmpxchg64(volatile void *ptr,
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unsigned long long old, unsigned long long new)
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unsigned long long old,
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unsigned long long new)
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{
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unsigned long long prev;
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__asm__ __volatile__(LOCK_PREFIX "cmpxchg8b %3"
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asm volatile(LOCK_PREFIX "cmpxchg8b %3"
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: "=A"(prev)
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: "b"((unsigned long)new),
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"c"((unsigned long)(new >> 32)),
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}
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static inline unsigned long long __cmpxchg64_local(volatile void *ptr,
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unsigned long long old, unsigned long long new)
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unsigned long long old,
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unsigned long long new)
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{
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unsigned long long prev;
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__asm__ __volatile__("cmpxchg8b %3"
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asm volatile("cmpxchg8b %3"
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: "=A"(prev)
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: "b"((unsigned long)new),
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"c"((unsigned long)(new >> 32)),
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