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R-Car Display Unit & related changes: 

- DT bindings conversion to YAML
 - Planes zpos sanity check and fix
 - MAINTAINERS entry for LVDS panel driver
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Merge tag 'du-next-20200514' of git://linuxtv.org/pinchartl/media into drm-next

R-Car Display Unit & related changes:

- DT bindings conversion to YAML
- Planes zpos sanity check and fix
- MAINTAINERS entry for LVDS panel driver

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200514012844.GA7196@pendragon.ideasonboard.com
This commit is contained in:
Dave Airlie 2020-05-14 13:41:42 +10:00
parent 49eea1c657 7982471d01
commit 80c9b58e95
15 changed files with 294 additions and 234 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
Documentation/devicetree/bindings/display/bridge/adi,adv7123.txt
View File

@ -1,50 +0,0 @@
Analog Devices ADV7123 Video DAC
--------------------------------
The ADV7123 is a digital-to-analog converter that outputs VGA signals from a
parallel video input.
Required properties:
- compatible: Should be "adi,adv7123"
Optional properties:
- psave-gpios: Power save control GPIO
Required nodes:
The ADV7123 has two video ports. Their connections are modeled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 for DPI input
- Video port 1 for VGA output
Example
-------
adv7123: encoder@0 {
compatible = "adi,adv7123";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7123_in: endpoint@0 {
remote-endpoint = <&dpi_out>;
};
};
port@1 {
reg = <1>;
adv7123_out: endpoint@0 {
remote-endpoint = <&vga_connector_in>;
};
};
};
};

8
Documentation/devicetree/bindings/display/bridge/anx6345.yaml
View File

@ -37,6 +37,12 @@ properties:
type: object
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: |
@ -51,6 +57,8 @@ properties:
required:
- port@0
additionalProperties: false
required:
- compatible
- reg

50
Documentation/devicetree/bindings/display/bridge/dumb-vga-dac.txt
View File

@ -1,50 +0,0 @@
Dumb RGB to VGA DAC bridge
---------------------------
This binding is aimed for dumb RGB to VGA DAC based bridges that do not require
any configuration.
Required properties:
- compatible: Must be "dumb-vga-dac"
Required nodes:
This device has two video ports. Their connections are modelled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 for RGB input
- Video port 1 for VGA output
Optional properties:
- vdd-supply: Power supply for DAC
Example
-------
bridge {
compatible = "dumb-vga-dac";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&tcon0_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};

8
Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml
View File

@ -50,6 +50,12 @@ properties:
This device has two video ports. Their connections are modeled using the
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: |
@ -66,6 +72,8 @@ properties:
- port@0
- port@1
additionalProperties: false
powerdown-gpios:
description:
The GPIO used to control the power down line of this device.

8
Documentation/devicetree/bindings/display/bridge/ps8640.yaml
View File

@ -50,6 +50,12 @@ properties:
Documentation/devicetree/bindings/media/video-interfaces.txt
Documentation/devicetree/bindings/graph.txt
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: |
@ -63,6 +69,8 @@ properties:
required:
- port@0
additionalProperties: false
required:
- compatible
- reg

99
Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml Normal file
View File

@ -0,0 +1,99 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Transparent non-programmable DRM bridges
maintainers:
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
- Maxime Ripard <mripard@kernel.org>
description: |
This binding supports transparent non-programmable bridges that don't require
any configuration, with a single input and a single output.
properties:
compatible:
oneOf:
- items:
- enum:
- ti,ths8134a
- ti,ths8134b
- const: ti,ths8134
- enum:
- adi,adv7123
- dumb-vga-dac
- ti,opa362
- ti,ths8134
- ti,ths8135
ports:
type: object
description: |
This device has two video ports. Their connections are modeled using the
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: The bridge input
port@1:
type: object
description: The bridge output
required:
- port@0
- port@1
additionalProperties: false
enable-gpios:
maxItems: 1
description: GPIO controlling bridge enable
vdd-supply:
maxItems: 1
description: Power supply for the bridge
required:
- compatible
- ports
additionalProperties: false
examples:
- |
bridge {
compatible = "ti,ths8134a", "ti,ths8134";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&tcon0_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
...

66
Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt
View File

@ -1,66 +0,0 @@
Thine Electronics THC63LVD1024 LVDS decoder
-------------------------------------------
The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS streams
to parallel data outputs. The chip supports single/dual input/output modes,
handling up to two LVDS input streams and up to two digital CMOS/TTL outputs.
Single or dual operation mode, output data mapping and DDR output modes are
configured through input signals and the chip does not expose any control bus.
Required properties:
- compatible: Shall be "thine,thc63lvd1024"
- vcc-supply: Power supply for TTL output, TTL CLOCKOUT signal, LVDS input,
PPL and digital circuitry
Optional properties:
- powerdown-gpios: Power down GPIO signal, pin name "/PDWN". Active low
- oe-gpios: Output enable GPIO signal, pin name "OE". Active high
The THC63LVD1024 video port connections are modeled according
to OF graph bindings specified by Documentation/devicetree/bindings/graph.txt
Required video port nodes:
- port@0: First LVDS input port
- port@2: First digital CMOS/TTL parallel output
Optional video port nodes:
- port@1: Second LVDS input port
- port@3: Second digital CMOS/TTL parallel output
The device can operate in single-link mode or dual-link mode. In single-link
mode, all pixels are received on port@0, and port@1 shall not contain any
endpoint. In dual-link mode, even-numbered pixels are received on port@0 and
odd-numbered pixels on port@1, and both port@0 and port@1 shall contain
endpoints.
Example:
--------
thc63lvd1024: lvds-decoder {
compatible = "thine,thc63lvd1024";
vcc-supply = <&reg_lvds_vcc>;
powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lvds_dec_in_0: endpoint {
remote-endpoint = <&lvds_out>;
};
};
port@2{
reg = <2>;
lvds_dec_out_2: endpoint {
remote-endpoint = <&adv7511_in>;
};
};
};
};

121
Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml Normal file
View File

@ -0,0 +1,121 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/thine,thc63lvd1024.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Thine Electronics THC63LVD1024 LVDS Decoder
maintainers:
- Jacopo Mondi <jacopo+renesas@jmondi.org>
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
description: |
The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
streams to parallel data outputs. The chip supports single/dual input/output
modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
outputs.
Single or dual operation mode, output data mapping and DDR output modes are
configured through input signals and the chip does not expose any control
bus.
properties:
compatible:
const: thine,thc63lvd1024
ports:
type: object
description: |
This device has four video ports. Their connections are modeled using the
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
The device can operate in single-link mode or dual-link mode. In
single-link mode, all pixels are received on port@0, and port@1 shall not
contain any endpoint. In dual-link mode, even-numbered pixels are
received on port@0 and odd-numbered pixels on port@1, and both port@0 and
port@1 shall contain endpoints.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: First LVDS input port
port@1:
type: object
description: Second LVDS input port
port@2:
type: object
description: First digital CMOS/TTL parallel output
port@3:
type: object
description: Second digital CMOS/TTL parallel output
required:
- port@0
- port@2
additionalProperties: false
oe-gpios:
maxItems: 1
description: Output enable GPIO signal, pin name "OE", active high.
powerdown-gpios:
maxItems: 1
description: Power down GPIO signal, pin name "/PDWN", active low.
vcc-supply:
maxItems: 1
description:
Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and
digital circuitry.
required:
- compatible
- ports
- vcc-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
lvds-decoder {
compatible = "thine,thc63lvd1024";
vcc-supply = <&reg_lvds_vcc>;
powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lvds_dec_in_0: endpoint {
remote-endpoint = <&lvds_out>;
};
};
port@2 {
reg = <2>;
lvds_dec_out_2: endpoint {
remote-endpoint = <&adv7511_in>;
};
};
};
};
...

51
Documentation/devicetree/bindings/display/bridge/ti,ths813x.txt
View File

@ -1,51 +0,0 @@
THS8134 and THS8135 Video DAC
-----------------------------
This is the binding for Texas Instruments THS8134, THS8134A, THS8134B and
THS8135 Video DAC bridges.
Required properties:
- compatible: Must be one of
"ti,ths8134"
"ti,ths8134a," "ti,ths8134"
"ti,ths8134b", "ti,ths8134"
"ti,ths8135"
Required nodes:
This device has two video ports. Their connections are modelled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 for RGB input
- Video port 1 for VGA output
Example
-------
vga-bridge {
compatible = "ti,ths8135";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&lcdc_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};

10
Documentation/devicetree/bindings/display/renesas,du.txt
View File

@ -50,6 +50,14 @@ Required Properties:
VSP instance that serves the DU channel, and the channel index identifies
the LIF instance in that VSP.
Optional properties:
- resets: A list of phandle + reset-specifier pairs, one for each entry in
the reset-names property.
- reset-names: Names of the resets. This property is model-dependent.
- All but R8A7779 use one reset for a group of one or more successive
channels. The resets must be named "du.x" with "x" being the numerical
index of the lowest channel in the group.
Required nodes:
The connections to the DU output video ports are modeled using the OF graph
@ -96,6 +104,8 @@ Example: R8A7795 (R-Car H3) ES2.0 DU
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.2", "du.3";
resets = <&cpg 724>, <&cpg 722>;
reset-names = "du.0", "du.2";
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;

8
MAINTAINERS
View File

@ -5335,6 +5335,14 @@ S: Orphan / Obsolete
F: drivers/gpu/drm/i810/
F: include/uapi/drm/i810_drm.h
DRM DRIVER FOR LVDS PANELS
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
L: dri-devel@lists.freedesktop.org
T: git git://anongit.freedesktop.org/drm/drm-misc
S: Maintained
F: drivers/gpu/drm/panel/panel-lvds.c
F: Documentation/devicetree/bindings/display/panel/lvds.yaml
DRM DRIVER FOR MATROX G200/G400 GRAPHICS CARDS
S: Orphan / Obsolete
F: drivers/gpu/drm/mga/

10
drivers/gpu/drm/drm_blend.c
View File

@ -135,7 +135,9 @@
* are underneath planes with higher Z position values. Two planes with the
* same Z position value have undefined ordering. Note that the Z position
* value can also be immutable, to inform userspace about the hard-coded
* stacking of planes, see drm_plane_create_zpos_immutable_property().
* stacking of planes, see drm_plane_create_zpos_immutable_property(). If
* any plane has a zpos property (either mutable or immutable), then all
* planes shall have a zpos property.
*
* pixel blend mode:
* Pixel blend mode is set up with drm_plane_create_blend_mode_property().
@ -344,10 +346,10 @@ EXPORT_SYMBOL(drm_rotation_simplify);
* should be set to 0 and max to maximal number of planes for given crtc - 1.
*
* If zpos of some planes cannot be changed (like fixed background or
* cursor/topmost planes), driver should adjust min/max values and assign those
* planes immutable zpos property with lower or higher values (for more
* cursor/topmost planes), drivers shall adjust the min/max values and assign
* those planes immutable zpos properties with lower or higher values (for more
* information, see drm_plane_create_zpos_immutable_property() function). In such
* case driver should also assign proper initial zpos values for all planes in
* case drivers shall also assign proper initial zpos values for all planes in
* its plane_reset() callback, so the planes will be always sorted properly.
*
* See also drm_atomic_normalize_zpos().

9
drivers/gpu/drm/drm_plane.c
View File

@ -289,6 +289,8 @@ EXPORT_SYMBOL(drm_universal_plane_init);
int drm_plane_register_all(struct drm_device *dev)
{
unsigned int num_planes = 0;
unsigned int num_zpos = 0;
struct drm_plane *plane;
int ret = 0;
@ -297,8 +299,15 @@ int drm_plane_register_all(struct drm_device *dev)
ret = plane->funcs->late_register(plane);
if (ret)
return ret;
if (plane->zpos_property)
num_zpos++;
num_planes++;
}
drm_WARN(dev, num_zpos && num_planes != num_zpos,
"Mixing planes with and without zpos property is invalid\n");
return 0;
}

16
drivers/gpu/drm/rcar-du/rcar_du_plane.c
View File

@ -785,13 +785,15 @@ int rcar_du_planes_init(struct rcar_du_group *rgrp)
drm_plane_create_alpha_property(&plane->plane);
if (type == DRM_PLANE_TYPE_PRIMARY)
continue;
drm_object_attach_property(&plane->plane.base,
rcdu->props.colorkey,
RCAR_DU_COLORKEY_NONE);
drm_plane_create_zpos_property(&plane->plane, 1, 1, 7);
if (type == DRM_PLANE_TYPE_PRIMARY) {
drm_plane_create_zpos_immutable_property(&plane->plane,
0);
} else {
drm_object_attach_property(&plane->plane.base,
rcdu->props.colorkey,
RCAR_DU_COLORKEY_NONE);
drm_plane_create_zpos_property(&plane->plane, 1, 1, 7);
}
}
return 0;

14
drivers/gpu/drm/rcar-du/rcar_du_vsp.c
View File

@ -392,12 +392,14 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
drm_plane_helper_add(&plane->plane,
&rcar_du_vsp_plane_helper_funcs);
if (type == DRM_PLANE_TYPE_PRIMARY)
continue;
drm_plane_create_alpha_property(&plane->plane);
drm_plane_create_zpos_property(&plane->plane, 1, 1,
vsp->num_planes - 1);
if (type == DRM_PLANE_TYPE_PRIMARY) {
drm_plane_create_zpos_immutable_property(&plane->plane,
0);
} else {
drm_plane_create_alpha_property(&plane->plane);
drm_plane_create_zpos_property(&plane->plane, 1, 1,
vsp->num_planes - 1);
}
}
return 0;