powerpc: Add PCI support for 8540 ADS to powerpc tree
Add PCI support for setting PCI from flat device tree on 85xx specifically for MPC8540 ADS. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Andy Fleming
Kumar Gala
parent
774fee58c4
commit
8080d54971
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@ -1,4 +1,5 @@
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#
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# Makefile for the PowerPC 85xx linux kernel.
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#
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obj-$(CONFIG_PPC_85xx) += misc.o mpc85xx_ads.o
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obj-$(CONFIG_PPC_85xx) += misc.o pci.o
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obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
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@ -30,30 +30,6 @@
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#define PIRQC MPC85xx_IRQ_EXT3
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#define PIRQD MPC85xx_IRQ_EXT4
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#define MPC85XX_PCI1_LOWER_IO 0x00000000
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#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
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#define MPC85XX_PCI1_LOWER_MEM 0x80000000
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#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
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#define MPC85XX_PCI1_IO_BASE 0xe2000000
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#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
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#define MPC85XX_PCI1_IO_SIZE 0x01000000
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/* PCI config */
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#define PCI1_CFG_ADDR_OFFSET (0x8000)
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#define PCI1_CFG_DATA_OFFSET (0x8004)
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#define PCI2_CFG_ADDR_OFFSET (0x9000)
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#define PCI2_CFG_DATA_OFFSET (0x9004)
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/* Additional register for PCI-X configuration */
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#define PCIX_NEXT_CAP 0x60
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#define PCIX_CAP_ID 0x61
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#define PCIX_COMMAND 0x62
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#define PCIX_STATUS 0x64
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/* Offset of CPM register space */
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#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
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@ -15,3 +15,4 @@
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*/
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extern void mpc85xx_restart(char *);
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extern int add_bridge(struct device_node *dev);
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@ -67,6 +67,62 @@ static u_char mpc85xx_ads_openpic_initsenses[] __initdata = {
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0x0, /* External 11: */
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};
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#ifdef CONFIG_PCI
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/*
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* interrupt routing
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*/
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int
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mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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{
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static char pci_irq_table[][4] =
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/*
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* This is little evil, but works around the fact
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* that revA boards have IDSEL starting at 18
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* and others boards (older) start at 12
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*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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{
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 2 */
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{PIRQD, PIRQA, PIRQB, PIRQC},
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{PIRQC, PIRQD, PIRQA, PIRQB},
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 5 */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 12 */
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{PIRQD, PIRQA, PIRQB, PIRQC},
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{PIRQC, PIRQD, PIRQA, PIRQB},
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 15 */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 18 */
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{PIRQD, PIRQA, PIRQB, PIRQC},
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{PIRQC, PIRQD, PIRQA, PIRQB},
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 21 */
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};
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const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4;
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return PCI_IRQ_TABLE_LOOKUP;
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}
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int
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mpc85xx_exclude_device(u_char bus, u_char devfn)
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{
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if (bus == 0 && PCI_SLOT(devfn) == 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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else
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return PCIBIOS_SUCCESSFUL;
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}
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#endif /* CONFIG_PCI */
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void __init mpc85xx_ads_pic_init(void)
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{
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struct mpic *mpic1;
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@ -110,6 +166,7 @@ void __init mpc85xx_ads_pic_init(void)
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static void __init mpc85xx_ads_setup_arch(void)
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{
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struct device_node *cpu;
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struct device_node *np;
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if (ppc_md.progress)
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ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
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@ -125,6 +182,16 @@ static void __init mpc85xx_ads_setup_arch(void)
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loops_per_jiffy = 50000000 / HZ;
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of_node_put(cpu);
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}
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#ifdef CONFIG_PCI
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for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
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add_bridge(np);
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ppc_md.pci_swizzle = common_swizzle;
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ppc_md.pci_map_irq = mpc85xx_map_irq;
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ppc_md.pci_exclude_device = mpc85xx_exclude_device;
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#endif
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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@ -0,0 +1,96 @@
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/*
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* FSL SoC setup code
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/io.h>
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#include <asm/pci-bridge.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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int mpc85xx_pci2_busno = 0;
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#ifdef CONFIG_PCI
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int __init add_bridge(struct device_node *dev)
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{
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int len;
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struct pci_controller *hose;
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struct resource rsrc;
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int *bus_range;
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int primary = 1, has_address = 0;
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phys_addr_t immr = get_immrbase();
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DBG("Adding PCI host bridge %s\n", dev->full_name);
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/* Fetch host bridge registers address */
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has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
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/* Get bus range if any */
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bus_range = (int *) get_property(dev, "bus-range", &len);
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if (bus_range == NULL || len < 2 * sizeof(int)) {
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printk(KERN_WARNING "Can't get bus-range for %s, assume"
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" bus 0\n", dev->full_name);
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}
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hose = pcibios_alloc_controller();
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if (!hose)
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return -ENOMEM;
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hose->arch_data = dev;
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hose->set_cfg_type = 1;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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/* PCI 1 */
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if ((rsrc.start & 0xfffff) == 0x8000) {
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setup_indirect_pci(hose, immr + 0x8000, immr + 0x8004);
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}
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/* PCI 2 */
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if ((rsrc.start & 0xfffff) == 0x9000) {
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setup_indirect_pci(hose, immr + 0x9000, immr + 0x9004);
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primary = 0;
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hose->bus_offset = hose->first_busno;
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mpc85xx_pci2_busno = hose->first_busno;
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}
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printk(KERN_INFO "Found MPC85xx PCI host bridge at 0x%08lx. "
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"Firmware bus number: %d->%d\n",
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rsrc.start, hose->first_busno, hose->last_busno);
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DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
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hose, hose->cfg_addr, hose->cfg_data);
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/* Interpret the "ranges" property */
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/* This also maps the I/O region and sets isa_io/mem_base */
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pci_process_bridge_OF_ranges(hose, dev, primary);
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return 0;
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}
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#endif
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