Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
  sparc32: Fixed unaligned memory copying in function __csum_partial_copy_sparc_generic
  sparc32: fix sparcstation 5 boot
  sparc32: fix section mismatch warnings in apc, pmc and time_32
This commit is contained in:
Linus Torvalds 2011-05-12 07:53:34 -07:00
commit 8043f4eb85
5 changed files with 19 additions and 9 deletions

View File

@ -165,7 +165,7 @@ static int __devinit apc_probe(struct platform_device *op)
return 0;
}
static struct of_device_id __initdata apc_match[] = {
static struct of_device_id apc_match[] = {
{
.name = APC_OBPNAME,
},

View File

@ -69,7 +69,7 @@ static int __devinit pmc_probe(struct platform_device *op)
return 0;
}
static struct of_device_id __initdata pmc_match[] = {
static struct of_device_id pmc_match[] = {
{
.name = PMC_OBPNAME,
},

View File

@ -53,6 +53,7 @@ cpumask_t smp_commenced_mask = CPU_MASK_NONE;
void __cpuinit smp_store_cpu_info(int id)
{
int cpu_node;
int mid;
cpu_data(id).udelay_val = loops_per_jiffy;
@ -60,10 +61,13 @@ void __cpuinit smp_store_cpu_info(int id)
cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
"clock-frequency", 0);
cpu_data(id).prom_node = cpu_node;
cpu_data(id).mid = cpu_get_hwmid(cpu_node);
mid = cpu_get_hwmid(cpu_node);
if (cpu_data(id).mid < 0)
panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
if (mid < 0) {
printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08d", id, cpu_node);
mid = 0;
}
cpu_data(id).mid = mid;
}
void __init smp_cpus_done(unsigned int max_cpus)

View File

@ -168,7 +168,7 @@ static int __devinit clock_probe(struct platform_device *op)
return 0;
}
static struct of_device_id __initdata clock_match[] = {
static struct of_device_id clock_match[] = {
{
.name = "eeprom",
},

View File

@ -289,10 +289,16 @@ cc_end_cruft:
/* Also, handle the alignment code out of band. */
cc_dword_align:
cmp %g1, 6
bl,a ccte
cmp %g1, 16
bge 1f
srl %g1, 1, %o3
2: cmp %o3, 0
be,a ccte
andcc %g1, 0xf, %o3
andcc %o0, 0x1, %g0
andcc %o3, %o0, %g0 ! Check %o0 only (%o1 has the same last 2 bits)
be,a 2b
srl %o3, 1, %o3
1: andcc %o0, 0x1, %g0
bne ccslow
andcc %o0, 0x2, %g0
be 1f