MIPS: c-r4k: Fix size calc when avoiding IPIs for small icache flushes
Commitf70ddc07b6
("MIPS: c-r4k: Avoid small flush_icache_range SMP calls") adds checks to force use of hit-type cache ops for small icache flushes where they are globalised & index-type cache ops aren't, in order to avoid the overhead of IPIs in those cases. However it calculated the size of the region being flushed incorrectly, subtracting the end address from the start address rather than the reverse. This would have led to an overflow with size wrapping round to some large value, and likely to the special case for avoiding IPIs not actually being hit. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Fixes:f70ddc07b6
("MIPS: c-r4k: Avoid small flush_icache_range SMP calls") Reviewed-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14211/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -800,7 +800,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
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* If address-based cache ops don't require an SMP call, then
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* use them exclusively for small flushes.
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*/
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size = start - end;
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size = end - start;
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cache_size = icache_size;
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if (!cpu_has_ic_fills_f_dc) {
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size *= 2;
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