RISC-V Fixes for 5.12-rc6

I have a handful of fixes for 5.12:
 
 * A fix for a stack tracing regression related to "const register asm"
   variables, which have unexpected behavior.
 * A fix to put_user() that ensures the value to be written is evaluated
   before enabling access to userspace memory..
 * A fix to align the exception vector table correctly, so we don't rely
   on the firmware's handling of unaligned accesses.
 * A build fix to make NUMA depend on MMU, which triggers some
   randconfigs.
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Merge tag 'riscv-for-linus-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:
 "A handful of fixes for 5.12:

   - fix a stack tracing regression related to "const register asm"
     variables, which have unexpected behavior.

   - ensure the value to be written by put_user() is evaluated before
     enabling access to userspace memory..

   - align the exception vector table correctly, so we don't rely on the
     firmware's handling of unaligned accesses.

   - build fix to make NUMA depend on MMU, which triggered on some
     randconfigs"

* tag 'riscv-for-linus-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Make NUMA depend on MMU
  riscv: remove unneeded semicolon
  riscv,entry: fix misaligned base for excp_vect_table
  riscv: evaluate put_user() arg before enabling user access
  riscv: Drop const annotation for sp
This commit is contained in:
Linus Torvalds 2021-04-03 11:52:18 -07:00
commit 7fd7d5c201
5 changed files with 9 additions and 5 deletions

View File

@ -314,7 +314,7 @@ endchoice
# Common NUMA Features # Common NUMA Features
config NUMA config NUMA
bool "NUMA Memory Allocation and Scheduler Support" bool "NUMA Memory Allocation and Scheduler Support"
depends on SMP depends on SMP && MMU
select GENERIC_ARCH_NUMA select GENERIC_ARCH_NUMA
select OF_NUMA select OF_NUMA
select ARCH_SUPPORTS_NUMA_BALANCING select ARCH_SUPPORTS_NUMA_BALANCING

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@ -306,7 +306,9 @@ do { \
* data types like structures or arrays. * data types like structures or arrays.
* *
* @ptr must have pointer-to-simple-variable type, and @x must be assignable * @ptr must have pointer-to-simple-variable type, and @x must be assignable
* to the result of dereferencing @ptr. * to the result of dereferencing @ptr. The value of @x is copied to avoid
* re-ordering where @x is evaluated inside the block that enables user-space
* access (thus bypassing user space protection if @x is a function).
* *
* Caller must check the pointer with access_ok() before calling this * Caller must check the pointer with access_ok() before calling this
* function. * function.
@ -316,12 +318,13 @@ do { \
#define __put_user(x, ptr) \ #define __put_user(x, ptr) \
({ \ ({ \
__typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \
__typeof__(*__gu_ptr) __val = (x); \
long __pu_err = 0; \ long __pu_err = 0; \
\ \
__chk_user_ptr(__gu_ptr); \ __chk_user_ptr(__gu_ptr); \
\ \
__enable_user_access(); \ __enable_user_access(); \
__put_user_nocheck(x, __gu_ptr, __pu_err); \ __put_user_nocheck(__val, __gu_ptr, __pu_err); \
__disable_user_access(); \ __disable_user_access(); \
\ \
__pu_err; \ __pu_err; \

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@ -447,6 +447,7 @@ ENDPROC(__switch_to)
#endif #endif
.section ".rodata" .section ".rodata"
.align LGREG
/* Exception vector table */ /* Exception vector table */
ENTRY(excp_vect_table) ENTRY(excp_vect_table)
RISCV_PTR do_trap_insn_misaligned RISCV_PTR do_trap_insn_misaligned

View File

@ -14,7 +14,7 @@
#include <asm/stacktrace.h> #include <asm/stacktrace.h>
register const unsigned long sp_in_global __asm__("sp"); register unsigned long sp_in_global __asm__("sp");
#ifdef CONFIG_FRAME_POINTER #ifdef CONFIG_FRAME_POINTER

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@ -216,7 +216,7 @@ void __init kasan_init(void)
break; break;
kasan_populate(kasan_mem_to_shadow(start), kasan_mem_to_shadow(end)); kasan_populate(kasan_mem_to_shadow(start), kasan_mem_to_shadow(end));
}; }
for (i = 0; i < PTRS_PER_PTE; i++) for (i = 0; i < PTRS_PER_PTE; i++)
set_pte(&kasan_early_shadow_pte[i], set_pte(&kasan_early_shadow_pte[i],