RISC-V Fixes for 5.12-rc6
I have a handful of fixes for 5.12: * A fix for a stack tracing regression related to "const register asm" variables, which have unexpected behavior. * A fix to put_user() that ensures the value to be written is evaluated before enabling access to userspace memory.. * A fix to align the exception vector table correctly, so we don't rely on the firmware's handling of unaligned accesses. * A build fix to make NUMA depend on MMU, which triggers some randconfigs. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmBotiMTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiXx1EACbRX+q7EKS6LqAjlX4GLSTP2R785HU seqJx1i7XU3kLDP8SO5zPrF19Ea48U1Psy4fyrQlHZG/8GqpbyoORqyMS6uABvqR iggkKyx7vJWEenxMgrsBSrVmRjcdqFmwrC6VMm0pCWhX2X5rywf9Xpa3wQ1IBGKt 2f+HG4TjJNN++twgoegUaeG3SpW3CtJwZgR8d5sNES2ElnKBQxXd2mfAYGyRcnVi x5vQtP7NI0W+PXfvyzUg9it8clG3XVyzifEeUBqh0XzG0xbo/rnICwOqqBC6jTSU b1NblRZvS+Zi1/GCFnWp/5Lq2kMmVb5Ptcu0SQnHzn/TQAjoGBQ8blqv/rzcwTjU uI28C/k1EfB1qIPi1dkOx3LsRYuxDFKWDTC3BpTmFykdQpnkgchSEHEbQOrp2Rko aljsm0PlDhkpIGOwbkhgojPRTfsM+ZVklr/WEq1/uqexG8MDck8AycT5InsyoiyF 5XeFQdwEORSLm1kSEw6zPEoD3o0DO0WDx/KamhSPFSF/t3NWO6IjM1KXhG3VSGdf EG4pbL82l7GUvRZBmPxZaeT7/YKV46xa73k1tuyC6B/sBllv7c9gl+/zwM/Db5sO sfLxjOmmRgFxULre9oTwRpimrPKWdduGrmwz9I6aJZNW77UZ/AsFLCw/SYDApP9Y SiqvSfliS5l1pA== =DUBG -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: "A handful of fixes for 5.12: - fix a stack tracing regression related to "const register asm" variables, which have unexpected behavior. - ensure the value to be written by put_user() is evaluated before enabling access to userspace memory.. - align the exception vector table correctly, so we don't rely on the firmware's handling of unaligned accesses. - build fix to make NUMA depend on MMU, which triggered on some randconfigs" * tag 'riscv-for-linus-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Make NUMA depend on MMU riscv: remove unneeded semicolon riscv,entry: fix misaligned base for excp_vect_table riscv: evaluate put_user() arg before enabling user access riscv: Drop const annotation for sp
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commit
7fd7d5c201
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@ -314,7 +314,7 @@ endchoice
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# Common NUMA Features
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# Common NUMA Features
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config NUMA
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config NUMA
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bool "NUMA Memory Allocation and Scheduler Support"
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bool "NUMA Memory Allocation and Scheduler Support"
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depends on SMP
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depends on SMP && MMU
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select GENERIC_ARCH_NUMA
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select GENERIC_ARCH_NUMA
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select OF_NUMA
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select OF_NUMA
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select ARCH_SUPPORTS_NUMA_BALANCING
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select ARCH_SUPPORTS_NUMA_BALANCING
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@ -306,7 +306,9 @@ do { \
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* data types like structures or arrays.
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* data types like structures or arrays.
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*
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*
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* @ptr must have pointer-to-simple-variable type, and @x must be assignable
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* @ptr must have pointer-to-simple-variable type, and @x must be assignable
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* to the result of dereferencing @ptr.
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* to the result of dereferencing @ptr. The value of @x is copied to avoid
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* re-ordering where @x is evaluated inside the block that enables user-space
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* access (thus bypassing user space protection if @x is a function).
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*
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*
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* Caller must check the pointer with access_ok() before calling this
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* Caller must check the pointer with access_ok() before calling this
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* function.
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* function.
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@ -316,12 +318,13 @@ do { \
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#define __put_user(x, ptr) \
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#define __put_user(x, ptr) \
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({ \
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({ \
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__typeof__(*(ptr)) __user *__gu_ptr = (ptr); \
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__typeof__(*(ptr)) __user *__gu_ptr = (ptr); \
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__typeof__(*__gu_ptr) __val = (x); \
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long __pu_err = 0; \
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long __pu_err = 0; \
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\
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\
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__chk_user_ptr(__gu_ptr); \
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__chk_user_ptr(__gu_ptr); \
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\
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\
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__enable_user_access(); \
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__enable_user_access(); \
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__put_user_nocheck(x, __gu_ptr, __pu_err); \
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__put_user_nocheck(__val, __gu_ptr, __pu_err); \
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__disable_user_access(); \
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__disable_user_access(); \
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\
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\
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__pu_err; \
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__pu_err; \
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@ -447,6 +447,7 @@ ENDPROC(__switch_to)
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#endif
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#endif
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.section ".rodata"
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.section ".rodata"
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.align LGREG
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/* Exception vector table */
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/* Exception vector table */
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ENTRY(excp_vect_table)
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ENTRY(excp_vect_table)
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RISCV_PTR do_trap_insn_misaligned
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RISCV_PTR do_trap_insn_misaligned
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@ -14,7 +14,7 @@
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#include <asm/stacktrace.h>
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#include <asm/stacktrace.h>
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register const unsigned long sp_in_global __asm__("sp");
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register unsigned long sp_in_global __asm__("sp");
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#ifdef CONFIG_FRAME_POINTER
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#ifdef CONFIG_FRAME_POINTER
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@ -216,7 +216,7 @@ void __init kasan_init(void)
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break;
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break;
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kasan_populate(kasan_mem_to_shadow(start), kasan_mem_to_shadow(end));
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kasan_populate(kasan_mem_to_shadow(start), kasan_mem_to_shadow(end));
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};
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}
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for (i = 0; i < PTRS_PER_PTE; i++)
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for (i = 0; i < PTRS_PER_PTE; i++)
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set_pte(&kasan_early_shadow_pte[i],
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set_pte(&kasan_early_shadow_pte[i],
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