staging: comedi: adv_pci_dio: remove defines used for the do registers
These defines are only used to initialize the diosubd_data 'addr' members in the boardinfo. For aesthetics, just open-code the values and remove the defines. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
Greg Kroah-Hartman
parent
d06ddc1967
commit
7f442292fa
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@ -50,19 +50,12 @@ enum hw_cards_id {
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/* Register offset definitions */
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/* Advantech PCI-1730/3/4 */
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#define PCI1730_IDO 0 /* W: Isolated digital output 0-15 */
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#define PCI1730_DO 2 /* W: Digital output 0-15 */
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#define PCI1730_3_INT_EN 0x08 /* R/W: enable/disable interrupts */
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#define PCI1730_3_INT_RF 0x0c /* R/W: set falling/raising edge for
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* interrupts */
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#define PCI1730_3_INT_CLR 0x10 /* R/W: clear interrupts */
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#define PCI1734_IDO 0 /* W: Isolated digital output 0-31 */
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/* Advantech PCI-1735U */
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#define PCI1735_DO 0 /* W: Digital output 0-31 */
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/* Advantech PCI-1736UP */
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#define PCI1736_IDO 0 /* W: Isolated digital output 0-15 */
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#define PCI1736_3_INT_EN 0x08 /* R/W: enable/disable interrupts */
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#define PCI1736_3_INT_RF 0x0c /* R/W: set falling/raising edge for
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* interrupts */
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@ -74,7 +67,6 @@ enum hw_cards_id {
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#define PCI1739_ISR 32 /* R: Interrupt status register */
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/* Advantech PCI-1750 */
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#define PCI1750_IDO 0 /* W: Isolated digital output 0-15 */
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#define PCI1750_ICR 32 /* W: Interrupt control register */
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#define PCI1750_ISR 32 /* R: Interrupt status register */
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@ -94,9 +86,6 @@ enum hw_cards_id {
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#define PCI1753E_ICR3 51 /* R/W: Interrupt control register group 3 */
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/* Advantech PCI-1752/4/6 */
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#define PCI1752_IDO 0 /* R/W: Digital output 0-31 */
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#define PCI1752_IDO2 4 /* R/W: Digital output 32-63 */
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#define PCI1756_IDO 4 /* R/W: Digital output 0-31 */
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#define PCI1754_6_ICR0 0x08 /* R/W: Interrupt control register group 0 */
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#define PCI1754_6_ICR1 0x0a /* R/W: Interrupt control register group 1 */
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#define PCI1754_ICR2 0x0c /* R/W: Interrupt control register group 2 */
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@ -104,7 +93,6 @@ enum hw_cards_id {
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#define PCI1752_6_CFC 0x12 /* R/W: set/read channel freeze function */
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/* Advantech PCI-1762 registers */
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#define PCI1762_RO 0 /* R/W: Relays status/output */
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#define PCI1762_ICR 6 /* W: Interrupt control register */
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#define PCI1762_ISR 6 /* R: Interrupt status register */
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@ -132,8 +120,8 @@ static const struct dio_boardtype boardtypes[] = {
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.nsubdevs = 5,
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.sdi[0] = { 16, 0x02, }, /* DI 0-15 */
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.sdi[1] = { 16, 0x00, }, /* ISO DI 0-15 */
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.sdo[0] = { 16, PCI1730_DO, },
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.sdo[1] = { 16, PCI1730_IDO, },
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.sdo[0] = { 16, 0x02, }, /* DO 0-15 */
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.sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */
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.id_reg = 0x04,
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},
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[TYPE_PCI1733] = {
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@ -147,7 +135,7 @@ static const struct dio_boardtype boardtypes[] = {
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.name = "pci1734",
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.cardtype = TYPE_PCI1734,
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.nsubdevs = 2,
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.sdo[1] = { 32, PCI1734_IDO, },
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.sdo[1] = { 32, 0x00, }, /* ISO DO 0-31 */
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.id_reg = 0x04,
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},
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[TYPE_PCI1735] = {
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@ -155,7 +143,7 @@ static const struct dio_boardtype boardtypes[] = {
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.cardtype = TYPE_PCI1735,
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.nsubdevs = 4,
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.sdi[0] = { 32, 0x00, }, /* DI 0-31 */
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.sdo[0] = { 32, PCI1735_DO, },
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.sdo[0] = { 32, 0x00, }, /* DO 0-31 */
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.id_reg = 0x08,
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.timer_regbase = 0x04,
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},
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@ -164,7 +152,7 @@ static const struct dio_boardtype boardtypes[] = {
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.cardtype = TYPE_PCI1736,
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.nsubdevs = 3,
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.sdi[1] = { 16, 0x00, }, /* ISO DI 0-15 */
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.sdo[1] = { 16, PCI1736_IDO, },
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.sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */
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.id_reg = 0x04,
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},
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[TYPE_PCI1739] = {
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@ -179,7 +167,7 @@ static const struct dio_boardtype boardtypes[] = {
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.cardtype = TYPE_PCI1750,
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.nsubdevs = 2,
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.sdi[1] = { 16, 0x00, }, /* ISO DI 0-15 */
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.sdo[1] = { 16, PCI1750_IDO, },
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.sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */
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},
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[TYPE_PCI1751] = {
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.name = "pci1751",
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@ -192,8 +180,8 @@ static const struct dio_boardtype boardtypes[] = {
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.name = "pci1752",
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.cardtype = TYPE_PCI1752,
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.nsubdevs = 3,
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.sdo[0] = { 32, PCI1752_IDO, },
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.sdo[1] = { 32, PCI1752_IDO2, },
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.sdo[0] = { 32, 0x00, }, /* DO 0-31 */
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.sdo[1] = { 32, 0x04, }, /* DO 32-63 */
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.id_reg = 0x10,
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.is_16bit = 1,
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},
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@ -224,7 +212,7 @@ static const struct dio_boardtype boardtypes[] = {
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.cardtype = TYPE_PCI1756,
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.nsubdevs = 3,
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.sdi[1] = { 32, 0x00, }, /* DI 0-31 */
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.sdo[1] = { 32, PCI1756_IDO, },
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.sdo[1] = { 32, 0x04, }, /* DO 0-31 */
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.id_reg = 0x10,
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.is_16bit = 1,
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},
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@ -233,7 +221,7 @@ static const struct dio_boardtype boardtypes[] = {
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.cardtype = TYPE_PCI1762,
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.nsubdevs = 3,
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.sdi[1] = { 16, 0x02, }, /* ISO DI 0-15 */
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.sdo[1] = { 16, PCI1762_RO, },
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.sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */
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.id_reg = 0x04,
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.is_16bit = 1,
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},
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