staging: xillybus: Fixed sparse errors
Changes: * xillybus.h: __iomem added to struct xilly_endpoint -> registers to suppress "different address spaces" errors. * xillybus_core.c: __user added as required for the same reason. * The two member names of struct xilly_endpoint_hardware of the form sync_single_for_{cpu,device} were changed to something that won't look like the well-known functions. * All *.c files: Variables and functions made static as required. Reported-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Eli Billauer <eli.billauer@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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853a57f2d3
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@ -122,7 +122,7 @@ struct xilly_endpoint {
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struct list_head ep_list;
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int dma_using_dac; /* =1 if 64-bit DMA is used, =0 otherwise. */
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u32 *registers;
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__iomem u32 *registers;
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int fatal_error;
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struct mutex register_mutex;
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@ -150,11 +150,11 @@ struct xilly_endpoint {
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struct xilly_endpoint_hardware {
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struct module *owner;
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void (*sync_single_for_cpu)(struct xilly_endpoint *,
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void (*hw_sync_sgl_for_cpu)(struct xilly_endpoint *,
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dma_addr_t,
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size_t,
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int);
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void (*sync_single_for_device)(struct xilly_endpoint *,
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void (*hw_sync_sgl_for_device)(struct xilly_endpoint *,
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dma_addr_t,
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size_t,
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int);
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@ -71,7 +71,7 @@ static struct class *xillybus_class;
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static LIST_HEAD(list_of_endpoints);
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static struct mutex ep_list_lock;
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struct workqueue_struct *xillybus_wq;
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static struct workqueue_struct *xillybus_wq;
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/*
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* Locking scheme: Mutexes protect invocations of character device methods.
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@ -145,7 +145,7 @@ irqreturn_t xillybus_isr(int irq, void *data)
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buf_size = ep->msg_buf_size/sizeof(u32);
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ep->ephw->sync_single_for_cpu(ep,
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ep->ephw->hw_sync_sgl_for_cpu(ep,
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ep->msgbuf_dma_addr,
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ep->msg_buf_size,
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DMA_FROM_DEVICE);
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@ -163,7 +163,7 @@ irqreturn_t xillybus_isr(int irq, void *data)
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pr_err("xillybus: Lost sync with "
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"interrupt messages. Stopping.\n");
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else {
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ep->ephw->sync_single_for_device(
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ep->ephw->hw_sync_sgl_for_device(
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ep,
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ep->msgbuf_dma_addr,
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ep->msg_buf_size,
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@ -297,7 +297,7 @@ irqreturn_t xillybus_isr(int irq, void *data)
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}
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}
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ep->ephw->sync_single_for_device(ep,
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ep->ephw->hw_sync_sgl_for_device(ep,
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ep->msgbuf_dma_addr,
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ep->msg_buf_size,
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DMA_FROM_DEVICE);
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@ -796,7 +796,7 @@ static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
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return rc;
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}
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endpoint->ephw->sync_single_for_cpu(
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endpoint->ephw->hw_sync_sgl_for_cpu(
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channel->endpoint,
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channel->wr_buffers[0]->dma_addr,
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channel->wr_buf_size,
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@ -832,8 +832,8 @@ static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
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return 0; /* Success */
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}
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static ssize_t xillybus_read(struct file *filp, char *userbuf, size_t count,
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loff_t *f_pos)
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static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
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size_t count, loff_t *f_pos)
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{
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ssize_t rc;
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unsigned long flags;
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@ -917,7 +917,7 @@ static ssize_t xillybus_read(struct file *filp, char *userbuf, size_t count,
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if (!empty) { /* Go on, now without the spinlock */
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if (bufpos == 0) /* Position zero means it's virgin */
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channel->endpoint->ephw->sync_single_for_cpu(
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channel->endpoint->ephw->hw_sync_sgl_for_cpu(
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channel->endpoint,
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channel->wr_buffers[bufidx]->dma_addr,
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channel->wr_buf_size,
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@ -934,7 +934,7 @@ static ssize_t xillybus_read(struct file *filp, char *userbuf, size_t count,
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if (bufferdone) {
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channel->endpoint->ephw->
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sync_single_for_device
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hw_sync_sgl_for_device
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(
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channel->endpoint,
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channel->wr_buffers[bufidx]->
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@ -1243,7 +1243,7 @@ static int xillybus_myflush(struct xilly_channel *channel, long timeout)
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else
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channel->rd_host_buf_idx++;
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channel->endpoint->ephw->sync_single_for_device(
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channel->endpoint->ephw->hw_sync_sgl_for_device(
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channel->endpoint,
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channel->rd_buffers[bufidx]->dma_addr,
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channel->rd_buf_size,
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@ -1362,7 +1362,7 @@ static void xillybus_autoflush(struct work_struct *work)
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}
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static ssize_t xillybus_write(struct file *filp, const char *userbuf,
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static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
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size_t count, loff_t *f_pos)
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{
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ssize_t rc;
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@ -1471,7 +1471,7 @@ static ssize_t xillybus_write(struct file *filp, const char *userbuf,
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if ((bufpos == 0) || /* Zero means it's virgin */
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(channel->rd_leftovers[3] != 0)) {
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channel->endpoint->ephw->sync_single_for_cpu(
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channel->endpoint->ephw->hw_sync_sgl_for_cpu(
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channel->endpoint,
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channel->rd_buffers[bufidx]->dma_addr,
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channel->rd_buf_size,
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@ -1494,7 +1494,7 @@ static ssize_t xillybus_write(struct file *filp, const char *userbuf,
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if (bufferdone) {
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channel->endpoint->ephw->
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sync_single_for_device(
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hw_sync_sgl_for_device(
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channel->endpoint,
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channel->rd_buffers[bufidx]->
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dma_addr,
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@ -1867,7 +1867,7 @@ static int xillybus_release(struct inode *inode, struct file *filp)
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return 0;
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}
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loff_t xillybus_llseek(struct file *filp, loff_t offset, int whence)
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static loff_t xillybus_llseek(struct file *filp, loff_t offset, int whence)
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{
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struct xilly_channel *channel = filp->private_data;
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loff_t pos = filp->f_pos;
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@ -85,7 +85,7 @@ static dma_addr_t xilly_map_single_of(struct xilly_cleanup *mem,
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return addr;
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}
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void xilly_unmap_single_of(struct xilly_dma *entry)
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static void xilly_unmap_single_of(struct xilly_dma *entry)
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{
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dma_unmap_single(entry->dev,
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entry->dma_addr,
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@ -95,8 +95,8 @@ void xilly_unmap_single_of(struct xilly_dma *entry)
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static struct xilly_endpoint_hardware of_hw = {
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.owner = THIS_MODULE,
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.sync_single_for_cpu = xilly_dma_sync_single_for_cpu_of,
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.sync_single_for_device = xilly_dma_sync_single_for_device_of,
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.hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_of,
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.hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_of,
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.map_single = xilly_map_single_of,
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.unmap_single = xilly_unmap_single_of
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};
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@ -112,7 +112,7 @@ static dma_addr_t xilly_map_single_pci(struct xilly_cleanup *mem,
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return addr;
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}
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void xilly_unmap_single_pci(struct xilly_dma *entry)
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static void xilly_unmap_single_pci(struct xilly_dma *entry)
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{
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pci_unmap_single(entry->pdev,
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entry->dma_addr,
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@ -122,8 +122,8 @@ void xilly_unmap_single_pci(struct xilly_dma *entry)
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static struct xilly_endpoint_hardware pci_hw = {
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.owner = THIS_MODULE,
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.sync_single_for_cpu = xilly_dma_sync_single_for_cpu_pci,
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.sync_single_for_device = xilly_dma_sync_single_for_device_pci,
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.hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_pci,
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.hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_pci,
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.map_single = xilly_map_single_pci,
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.unmap_single = xilly_unmap_single_pci
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};
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