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ASoC: rockchip: Revert "ASoC: rockchip: i2s: separate capture and playback" 

This reverts commit eba65d179c.

This broke audio on Veyron Jerry Chromebooks and I now cannot reproduce
the problem I was trying to fix even with this commit reverted, so it
seems that this was completely the wrong thing to do.

Reported-by: Enric Balletbo Serra <eballetbo@gmail.com>
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
John Keeping 2016-05-04 17:21:57 +01:00 committed by Mark Brown
parent a6e806c49e
commit 7e885d211f
1 changed files with 40 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

72
sound/soc/rockchip/rockchip_i2s.c
View File

@ -82,8 +82,8 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)
I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE); I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE);
regmap_update_bits(i2s->regmap, I2S_XFER, regmap_update_bits(i2s->regmap, I2S_XFER,
I2S_XFER_TXS_START, I2S_XFER_TXS_START | I2S_XFER_RXS_START,
I2S_XFER_TXS_START); I2S_XFER_TXS_START | I2S_XFER_RXS_START);
i2s->tx_start = true; i2s->tx_start = true;
} else { } else {
@ -92,23 +92,27 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)
regmap_update_bits(i2s->regmap, I2S_DMACR, regmap_update_bits(i2s->regmap, I2S_DMACR,
I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE); I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE);
regmap_update_bits(i2s->regmap, I2S_XFER, if (!i2s->rx_start) {
I2S_XFER_TXS_START, regmap_update_bits(i2s->regmap, I2S_XFER,
I2S_XFER_TXS_STOP); I2S_XFER_TXS_START |
I2S_XFER_RXS_START,
I2S_XFER_TXS_STOP |
I2S_XFER_RXS_STOP);
regmap_update_bits(i2s->regmap, I2S_CLR, regmap_update_bits(i2s->regmap, I2S_CLR,
I2S_CLR_TXC, I2S_CLR_TXC | I2S_CLR_RXC,
I2S_CLR_TXC); I2S_CLR_TXC | I2S_CLR_RXC);
regmap_read(i2s->regmap, I2S_CLR, &val);
/* Should wait for clear operation to finish */
while (val & I2S_CLR_TXC) {
regmap_read(i2s->regmap, I2S_CLR, &val); regmap_read(i2s->regmap, I2S_CLR, &val);
retry--;
if (!retry) { /* Should wait for clear operation to finish */
dev_warn(i2s->dev, "fail to clear\n"); while (val) {
break; regmap_read(i2s->regmap, I2S_CLR, &val);
retry--;
if (!retry) {
dev_warn(i2s->dev, "fail to clear\n");
break;
}
} }
} }
} }
@ -124,8 +128,8 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE); I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE);
regmap_update_bits(i2s->regmap, I2S_XFER, regmap_update_bits(i2s->regmap, I2S_XFER,
I2S_XFER_RXS_START, I2S_XFER_TXS_START | I2S_XFER_RXS_START,
I2S_XFER_RXS_START); I2S_XFER_TXS_START | I2S_XFER_RXS_START);
i2s->rx_start = true; i2s->rx_start = true;
} else { } else {
@ -134,23 +138,27 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
regmap_update_bits(i2s->regmap, I2S_DMACR, regmap_update_bits(i2s->regmap, I2S_DMACR,
I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE); I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE);
regmap_update_bits(i2s->regmap, I2S_XFER, if (!i2s->tx_start) {
I2S_XFER_RXS_START, regmap_update_bits(i2s->regmap, I2S_XFER,
I2S_XFER_RXS_STOP); I2S_XFER_TXS_START |
I2S_XFER_RXS_START,
I2S_XFER_TXS_STOP |
I2S_XFER_RXS_STOP);
regmap_update_bits(i2s->regmap, I2S_CLR, regmap_update_bits(i2s->regmap, I2S_CLR,
I2S_CLR_RXC, I2S_CLR_TXC | I2S_CLR_RXC,
I2S_CLR_RXC); I2S_CLR_TXC | I2S_CLR_RXC);
regmap_read(i2s->regmap, I2S_CLR, &val);
/* Should wait for clear operation to finish */
while (val & I2S_CLR_RXC) {
regmap_read(i2s->regmap, I2S_CLR, &val); regmap_read(i2s->regmap, I2S_CLR, &val);
retry--;
if (!retry) { /* Should wait for clear operation to finish */
dev_warn(i2s->dev, "fail to clear\n"); while (val) {
break; regmap_read(i2s->regmap, I2S_CLR, &val);
retry--;
if (!retry) {
dev_warn(i2s->dev, "fail to clear\n");
break;
}
} }
} }
} }