[ARM] 4874/2: ixp4xx: Add support for the Freecom FSG-3 board
The Freecom-FSG3 is a small network-attached-storage device with the following feature set: * Intel IXP422 * 4MB Flash (ixp4xx flash driver) * 64MB RAM * 4 USB 2.0 host ports (ehci and ohci drivers) * 1 WAN (eth1) and 3 LAN (eth0) ethernet ports * Supported by the open source ixp4xx ethernet driver * Via VT6421 disk controller (libata and sata-via drivers) * Internal hard disk (PATA supported, SATA not yet supported) * External SATA port (not yet supported) * ISL1208 RTC chip * Winbond 83782 temp sensor and fan controller * MiniPCI slot The ixp4xx_defconfig is also updated to support this device (the leds-fsg driver is to be submitted separately via the leds tree after this initial support is merged, as it depends on header gpio defines). Signed-off-by: Rod Whitby <rod@whitby.id.au> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Rod Whitby
Russell King
parent
05dda977f2
commit
7e36e2f535
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@ -165,6 +165,7 @@ CONFIG_ARCH_PRPMC1100=y
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CONFIG_MACH_NAS100D=y
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CONFIG_MACH_DSMG600=y
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CONFIG_ARCH_IXDP4XX=y
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CONFIG_MACH_FSG=y
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CONFIG_CPU_IXP46X=y
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CONFIG_CPU_IXP43X=y
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CONFIG_MACH_GTWX5715=y
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@ -770,7 +771,7 @@ CONFIG_ATA=y
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# CONFIG_SATA_SIL24 is not set
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# CONFIG_SATA_SIS is not set
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# CONFIG_SATA_ULI is not set
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# CONFIG_SATA_VIA is not set
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CONFIG_SATA_VIA=y
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# CONFIG_SATA_VITESSE is not set
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# CONFIG_SATA_INIC162X is not set
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# CONFIG_PATA_ALI is not set
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@ -1143,7 +1144,7 @@ CONFIG_HWMON=y
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# CONFIG_SENSORS_VIA686A is not set
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# CONFIG_SENSORS_VT1211 is not set
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# CONFIG_SENSORS_VT8231 is not set
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# CONFIG_SENSORS_W83781D is not set
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CONFIG_SENSORS_W83781D=y
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# CONFIG_SENSORS_W83791D is not set
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# CONFIG_SENSORS_W83792D is not set
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# CONFIG_SENSORS_W83793 is not set
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@ -1334,8 +1335,8 @@ CONFIG_LEDS_CLASS=y
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#
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# LED drivers
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#
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# CONFIG_LEDS_IXP4XX is not set
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CONFIG_LEDS_GPIO=y
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CONFIG_LEDS_FSG=y
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#
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# LED Triggers
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@ -1367,7 +1368,7 @@ CONFIG_RTC_INTF_DEV=y
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# CONFIG_RTC_DRV_DS1672 is not set
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# CONFIG_RTC_DRV_MAX6900 is not set
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# CONFIG_RTC_DRV_RS5C372 is not set
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# CONFIG_RTC_DRV_ISL1208 is not set
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CONFIG_RTC_DRV_ISL1208=y
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CONFIG_RTC_DRV_X1205=y
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CONFIG_RTC_DRV_PCF8563=y
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# CONFIG_RTC_DRV_PCF8583 is not set
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@ -125,6 +125,15 @@ config ARCH_IXDP4XX
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depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
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default y
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config MACH_FSG
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bool
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prompt "Freecom FSG-3"
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select PCI
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help
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Say 'Y' here if you want your kernel to support Freecom's
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FSG-3 device. For more information on this platform,
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see http://www.nslu2-linux.org/wiki/FSG3/HomePage
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#
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# Certain registers and IRQs are only enabled if supporting IXP465 CPUs
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#
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@ -15,6 +15,7 @@ obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
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obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
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obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
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obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
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obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
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obj-y += common.o
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@ -28,6 +29,7 @@ obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o
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obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o
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obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
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obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
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obj-$(CONFIG_MACH_FSG) += fsg-setup.o
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obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
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obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
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@ -0,0 +1,71 @@
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/*
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* arch/arch/mach-ixp4xx/fsg-pci.c
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*
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* FSG board-level PCI initialization
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*
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* Author: Rod Whitby <rod@whitby.id.au>
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* Maintainer: http://www.nslu2-linux.org/
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*
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* based on ixdp425-pci.c:
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/mach/pci.h>
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#include <asm/mach-types.h>
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void __init fsg_pci_preinit(void)
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{
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set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW);
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set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW);
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set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW);
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ixp4xx_pci_preinit();
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}
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static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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static int pci_irq_table[FSG_PCI_IRQ_LINES] = {
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IRQ_FSG_PCI_INTC,
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IRQ_FSG_PCI_INTB,
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IRQ_FSG_PCI_INTA,
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};
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int irq = -1;
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slot = slot - 11;
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if (slot >= 1 && slot <= FSG_PCI_MAX_DEV &&
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pin >= 1 && pin <= FSG_PCI_IRQ_LINES)
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irq = pci_irq_table[(slot - 1)];
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printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
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__func__, slot, pin, irq);
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return irq;
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}
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struct hw_pci fsg_pci __initdata = {
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.nr_controllers = 1,
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.preinit = fsg_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = ixp4xx_setup,
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.scan = ixp4xx_scan_bus,
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.map_irq = fsg_map_irq,
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};
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int __init fsg_pci_init(void)
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{
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if (machine_is_fsg())
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pci_common_init(&fsg_pci);
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return 0;
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}
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subsys_initcall(fsg_pci_init);
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@ -0,0 +1,276 @@
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/*
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* arch/arm/mach-ixp4xx/fsg-setup.c
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*
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* FSG board-setup
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*
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* Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
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*
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* based on ixdp425-setup.c:
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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* based on nslu2-power.c
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* Copyright (C) 2005 Tower Technologies
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*
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* Author: Rod Whitby <rod@whitby.id.au>
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* Maintainers: http://www.nslu2-linux.org/
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*
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*/
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#include <linux/if_ether.h>
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#include <linux/irq.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/leds.h>
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#include <linux/reboot.h>
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#include <linux/i2c.h>
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#include <linux/i2c-gpio.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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static struct flash_platform_data fsg_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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};
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static struct resource fsg_flash_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device fsg_flash = {
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev = {
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.platform_data = &fsg_flash_data,
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},
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.num_resources = 1,
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.resource = &fsg_flash_resource,
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};
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static struct i2c_gpio_platform_data fsg_i2c_gpio_data = {
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.sda_pin = FSG_SDA_PIN,
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.scl_pin = FSG_SCL_PIN,
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};
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static struct platform_device fsg_i2c_gpio = {
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.name = "i2c-gpio",
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.id = 0,
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.dev = {
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.platform_data = &fsg_i2c_gpio_data,
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},
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};
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static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
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{
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I2C_BOARD_INFO("rtc-isl1208", 0x6f),
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},
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};
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static struct resource fsg_uart_resources[] = {
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{
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.start = IXP4XX_UART1_BASE_PHYS,
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.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct plat_serial8250_port fsg_uart_data[] = {
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{
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.mapbase = IXP4XX_UART1_BASE_PHYS,
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.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART2,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{ }
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};
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static struct platform_device fsg_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = fsg_uart_data,
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},
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.num_resources = ARRAY_SIZE(fsg_uart_resources),
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.resource = fsg_uart_resources,
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};
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static struct platform_device fsg_leds = {
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.name = "fsg-led",
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.id = -1,
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};
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/* Built-in 10/100 Ethernet MAC interfaces */
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static struct eth_plat_info fsg_plat_eth[] = {
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{
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.phy = 5,
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.rxq = 3,
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.txreadyq = 20,
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}, {
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.phy = 4,
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.rxq = 4,
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.txreadyq = 21,
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}
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};
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static struct platform_device fsg_eth[] = {
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{
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.name = "ixp4xx_eth",
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.id = IXP4XX_ETH_NPEB,
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.dev = {
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.platform_data = fsg_plat_eth,
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},
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}, {
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.name = "ixp4xx_eth",
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.id = IXP4XX_ETH_NPEC,
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.dev = {
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.platform_data = fsg_plat_eth + 1,
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},
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}
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};
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static struct platform_device *fsg_devices[] __initdata = {
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&fsg_i2c_gpio,
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&fsg_flash,
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&fsg_leds,
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&fsg_eth[0],
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&fsg_eth[1],
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};
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static irqreturn_t fsg_power_handler(int irq, void *dev_id)
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{
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/* Signal init to do the ctrlaltdel action, this will bypass init if
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* it hasn't started and do a kernel_restart.
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*/
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ctrl_alt_del();
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return IRQ_HANDLED;
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}
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static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
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{
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/* This is the paper-clip reset which does an emergency reboot. */
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printk(KERN_INFO "Restarting system.\n");
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machine_restart(NULL);
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/* This should never be reached. */
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return IRQ_HANDLED;
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}
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static void __init fsg_init(void)
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{
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DECLARE_MAC_BUF(mac_buf);
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uint8_t __iomem *f;
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int i;
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ixp4xx_sys_init();
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fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
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fsg_flash_resource.end =
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IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
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*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
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*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
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/* Configure CS2 for operation, 8bit and writable */
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*IXP4XX_EXP_CS2 = 0xbfff0002;
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i2c_register_board_info(0, fsg_i2c_board_info,
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ARRAY_SIZE(fsg_i2c_board_info));
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/* This is only useful on a modified machine, but it is valuable
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* to have it first in order to see debug messages, and so that
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* it does *not* get removed if platform_add_devices fails!
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*/
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(void)platform_device_register(&fsg_uart);
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platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
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if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
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IRQF_DISABLED | IRQF_TRIGGER_LOW,
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"FSG reset button", NULL) < 0) {
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printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
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gpio_to_irq(FSG_RB_GPIO));
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}
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if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
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IRQF_DISABLED | IRQF_TRIGGER_LOW,
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"FSG power button", NULL) < 0) {
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printk(KERN_DEBUG "Power Button IRQ %d not available\n",
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gpio_to_irq(FSG_SB_GPIO));
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}
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/*
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* Map in a portion of the flash and read the MAC addresses.
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* Since it is stored in BE in the flash itself, we need to
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* byteswap it if we're in LE mode.
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*/
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f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
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if (f) {
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#ifdef __ARMEB__
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for (i = 0; i < 6; i++) {
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fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
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fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
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}
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#else
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/*
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Endian-swapped reads from unaligned addresses are
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required to extract the two MACs from the big-endian
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Redboot config area in flash.
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*/
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fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
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fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
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fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
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fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
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fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
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fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
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fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
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fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
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fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
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fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
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fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
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fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
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#endif
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iounmap(f);
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}
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printk(KERN_INFO "FSG: Using MAC address %s for port 0\n",
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print_mac(mac_buf, fsg_plat_eth[0].hwaddr));
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printk(KERN_INFO "FSG: Using MAC address %s for port 1\n",
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print_mac(mac_buf, fsg_plat_eth[1].hwaddr));
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}
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MACHINE_START(FSG, "Freecom FSG-3")
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/* Maintainer: www.nslu2-linux.org */
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
|
||||
.map_io = ixp4xx_map_io,
|
||||
.init_irq = ixp4xx_init_irq,
|
||||
.timer = &ixp4xx_timer,
|
||||
.boot_params = 0x0100,
|
||||
.init_machine = fsg_init,
|
||||
MACHINE_END
|
||||
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
* include/asm-arm/arch-ixp4xx/fsg.h
|
||||
*
|
||||
* Freecom FSG-3 platform specific definitions
|
||||
*
|
||||
* Author: Rod Whitby <rod@whitby.id.au>
|
||||
* Author: Tomasz Chmielewski <mangoo@wpkg.org>
|
||||
* Maintainers: http://www.nslu2-linux.org
|
||||
*
|
||||
* Based on coyote.h by
|
||||
* Copyright 2004 (c) MontaVista, Software, Inc.
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_HARDWARE_H__
|
||||
#error "Do not include this directly, instead #include <asm/hardware.h>"
|
||||
#endif
|
||||
|
||||
#define FSG_SDA_PIN 12
|
||||
#define FSG_SCL_PIN 13
|
||||
|
||||
/*
|
||||
* FSG PCI IRQs
|
||||
*/
|
||||
#define FSG_PCI_MAX_DEV 3
|
||||
#define FSG_PCI_IRQ_LINES 3
|
||||
|
||||
|
||||
/* PCI controller GPIO to IRQ pin mappings */
|
||||
#define FSG_PCI_INTA_PIN 6
|
||||
#define FSG_PCI_INTB_PIN 7
|
||||
#define FSG_PCI_INTC_PIN 5
|
||||
|
||||
/* Buttons */
|
||||
|
||||
#define FSG_SB_GPIO 4 /* sync button */
|
||||
#define FSG_RB_GPIO 9 /* reset button */
|
||||
#define FSG_UB_GPIO 10 /* usb button */
|
||||
|
||||
/* LEDs */
|
||||
|
||||
#define FSG_LED_WLAN_BIT 0
|
||||
#define FSG_LED_WAN_BIT 1
|
||||
#define FSG_LED_SATA_BIT 2
|
||||
#define FSG_LED_USB_BIT 4
|
||||
#define FSG_LED_RING_BIT 5
|
||||
#define FSG_LED_SYNC_BIT 7
|
||||
|
|
@ -45,5 +45,6 @@
|
|||
#include "nslu2.h"
|
||||
#include "nas100d.h"
|
||||
#include "dsmg600.h"
|
||||
#include "fsg.h"
|
||||
|
||||
#endif /* _ASM_ARCH_HARDWARE_H */
|
||||
|
|
|
|||
|
|
@ -128,4 +128,11 @@
|
|||
#define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7
|
||||
#define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6
|
||||
|
||||
/*
|
||||
* Freecom FSG-3 Board IRQs
|
||||
*/
|
||||
#define IRQ_FSG_PCI_INTA IRQ_IXP4XX_GPIO6
|
||||
#define IRQ_FSG_PCI_INTB IRQ_IXP4XX_GPIO7
|
||||
#define IRQ_FSG_PCI_INTC IRQ_IXP4XX_GPIO5
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue