arch/csky patches for 6.0-rc1
The pull request we've done: - Add jump-label - Add qspinlock - Enable ARCH_INLINE_READ*/WRITE*/SPIN* - Some fixups and a coding convention -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEE2KAv+isbWR/viAKHAXH1GYaIxXsFAmLrPFoSHGd1b3JlbkBr ZXJuZWwub3JnAAoJEAFx9RmGiMV737kQAI7SZ6LhbD/7i900RxMTNf4cZdb5t5XF wX3ajKB6uUaYRvB9SPotUsqulw7divDJiTrGWlJXMa//us0Z48AzIp15ampXtp64 tJ9PSl/BHYWAXbuNbl43qMkDtgNGWp7beTLjsV0dWr9o1AbSV+6ae3qA1xdizLpQ DDnl3EwvuQKPJuWV37ewr3wl+X5Mq/BpgA2yhCBZebo10ob+YusYo9vzTQ1ywW13 aIi3ROZI0NanX0pozcHpr2grK3UADp/Ut7nZ6udGs9pl7eDeRsTm8Zxgh+W5B6iO LvR6VXMCAlyNcs/y4iGyh01lC9B5z4fka5eeSY0/7wwmJOTiLwxCl4e72lA9Tme7 hHMRZYTez2GGxpBo+69hx16nkQ/I95bHLtJGpyuMkyBhm4QWTF3WPHqljS6klfeO N6uPzQyhQfJVKJpe44H4hGE6y0KHbvkYEkRnSsST6Uc4hh5Ie8WBbtJo3zvjQfvp +ub1zBqu9lfLGs1beNSJYmI/A19lIEllFXT28Ni/itRrzaR5pYXGh7bp3SMxjOmt gwRhQax4WQzZh+NIu72/Di3H5MWcW1sU2zazO9FA7uiibfyzeoUWaLuiqU1Zef76 rSduc2v23dg87sX0ZegFPiATZFZfaLve5l0qru8m35rk0rSdzgevdfBL6wqiosib 5+yH6Jsif8vf =rQLI -----END PGP SIGNATURE----- Merge tag 'csky-for-linus-6.0-rc1' of https://github.com/c-sky/csky-linux Pull csky updates from Guo Ren: - Add jump-label implementation - Add qspinlock support - Enable ARCH_INLINE_READ*/WRITE*/SPIN* - Some fixups and a coding convention * tag 'csky-for-linus-6.0-rc1' of https://github.com/c-sky/csky-linux: csky: abiv1: Fixup compile error csky: cmpxchg: Coding convention for BUILD_BUG() csky: Enable ARCH_INLINE_READ*/WRITE*/SPIN* csky: Add qspinlock support csky: Add jump-label implementation csky: Move HEAD_TEXT_SECTION out of __init_begin-end csky: Correct position of _stext csky: Use the bitmap API to allocate bitmaps csky/kprobe: reclaim insn_slot on kprobe unregistration
This commit is contained in:
commit
7df9075e23
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@ -8,6 +8,33 @@ config CSKY
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_USE_BUILTIN_BSWAP
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_USE_QUEUED_SPINLOCKS
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select ARCH_INLINE_READ_LOCK if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
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select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
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select COMMON_CLK
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@ -40,6 +67,8 @@ config CSKY
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select GX6605S_TIMER if CPU_CK610
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select HAVE_ARCH_TRACEHOOK
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
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select HAVE_ARCH_JUMP_LABEL_RELATIVE
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select HAVE_ARCH_MMAP_RND_BITS
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select HAVE_ARCH_SECCOMP_FILTER
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select HAVE_CONTEXT_TRACKING_USER
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@ -6,4 +6,10 @@
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#define __HAVE_ARCH_MEMCPY
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extern void *memcpy(void *, const void *, __kernel_size_t);
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#define __HAVE_ARCH_MEMMOVE
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extern void *memmove(void *, const void *, __kernel_size_t);
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#define __HAVE_ARCH_MEMSET
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extern void *memset(void *, int, __kernel_size_t);
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#endif /* __ABI_CSKY_STRING_H */
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@ -3,10 +3,10 @@ generic-y += asm-offsets.h
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generic-y += extable.h
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generic-y += gpio.h
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generic-y += kvm_para.h
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generic-y += spinlock.h
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generic-y += spinlock_types.h
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generic-y += mcs_spinlock.h
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generic-y += qrwlock.h
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generic-y += qrwlock_types.h
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generic-y += qspinlock.h
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generic-y += parport.h
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generic-y += user.h
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generic-y += vmlinux.lds.h
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@ -4,10 +4,9 @@
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#define __ASM_CSKY_CMPXCHG_H
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#ifdef CONFIG_SMP
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#include <linux/bug.h>
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#include <asm/barrier.h>
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extern void __bad_xchg(void);
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#define __xchg_relaxed(new, ptr, size) \
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({ \
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__typeof__(ptr) __ptr = (ptr); \
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@ -15,6 +14,26 @@ extern void __bad_xchg(void);
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__typeof__(*(ptr)) __ret; \
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unsigned long tmp; \
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switch (size) { \
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case 2: { \
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u32 ret; \
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u32 shif = ((ulong)__ptr & 2) ? 16 : 0; \
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u32 mask = 0xffff << shif; \
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__ptr = (__typeof__(ptr))((ulong)__ptr & ~2); \
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__asm__ __volatile__ ( \
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"1: ldex.w %0, (%4)\n" \
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" and %1, %0, %2\n" \
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" or %1, %1, %3\n" \
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" stex.w %1, (%4)\n" \
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" bez %1, 1b\n" \
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: "=&r" (ret), "=&r" (tmp) \
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: "r" (~mask), \
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"r" ((u32)__new << shif), \
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"r" (__ptr) \
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: "memory"); \
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__ret = (__typeof__(*(ptr))) \
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((ret & mask) >> shif); \
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break; \
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} \
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case 4: \
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asm volatile ( \
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"1: ldex.w %0, (%3) \n" \
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:); \
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break; \
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default: \
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__bad_xchg(); \
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BUILD_BUG(); \
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} \
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__ret; \
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})
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@ -56,7 +75,7 @@ extern void __bad_xchg(void);
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:); \
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break; \
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default: \
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__bad_xchg(); \
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BUILD_BUG(); \
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} \
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__ret; \
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})
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@ -87,7 +106,7 @@ extern void __bad_xchg(void);
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:); \
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break; \
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default: \
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__bad_xchg(); \
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BUILD_BUG(); \
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} \
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__ret; \
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})
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@ -119,7 +138,7 @@ extern void __bad_xchg(void);
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:); \
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break; \
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default: \
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__bad_xchg(); \
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BUILD_BUG(); \
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} \
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__ret; \
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})
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@ -0,0 +1,47 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __ASM_CSKY_JUMP_LABEL_H
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#define __ASM_CSKY_JUMP_LABEL_H
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#define JUMP_LABEL_NOP_SIZE 4
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static __always_inline bool arch_static_branch(struct static_key *key,
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bool branch)
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{
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asm_volatile_goto(
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"1: nop32 \n"
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" .pushsection __jump_table, \"aw\" \n"
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" .align 2 \n"
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" .long 1b - ., %l[label] - . \n"
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" .long %0 - . \n"
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" .popsection \n"
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: : "i"(&((char *)key)[branch]) : : label);
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return false;
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label:
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return true;
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}
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static __always_inline bool arch_static_branch_jump(struct static_key *key,
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bool branch)
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{
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asm_volatile_goto(
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"1: bsr32 %l[label] \n"
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" .pushsection __jump_table, \"aw\" \n"
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" .align 2 \n"
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" .long 1b - ., %l[label] - . \n"
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" .long %0 - . \n"
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" .popsection \n"
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: : "i"(&((char *)key)[branch]) : : label);
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return false;
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label:
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return true;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_CSKY_JUMP_LABEL_H */
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@ -0,0 +1,10 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_SECTIONS_H
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#define __ASM_SECTIONS_H
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#include <asm-generic/sections.h>
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extern char _start[];
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#endif /* __ASM_SECTIONS_H */
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@ -0,0 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_CSKY_SPINLOCK_H
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#define __ASM_CSKY_SPINLOCK_H
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#include <asm/qspinlock.h>
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#include <asm/qrwlock.h>
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/* See include/linux/spinlock.h */
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#define smp_mb__after_spinlock() smp_mb()
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#endif /* __ASM_CSKY_SPINLOCK_H */
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@ -0,0 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_CSKY_SPINLOCK_TYPES_H
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#define __ASM_CSKY_SPINLOCK_TYPES_H
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#include <asm-generic/qspinlock_types.h>
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#include <asm-generic/qrwlock_types.h>
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#endif /* __ASM_CSKY_SPINLOCK_TYPES_H */
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@ -13,6 +13,7 @@ obj-$(CONFIG_STACKTRACE) += stacktrace.o
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obj-$(CONFIG_CSKY_PMU_V1) += perf_event.o
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obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o
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obj-$(CONFIG_HAVE_PERF_REGS) += perf_regs.o
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obj-$(CONFIG_JUMP_LABEL) += jump_label.o
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ifdef CONFIG_FUNCTION_TRACER
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CFLAGS_REMOVE_ftrace.o = $(CC_FLAGS_FTRACE)
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@ -0,0 +1,54 @@
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// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/jump_label.h>
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#include <linux/kernel.h>
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#include <linux/memory.h>
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#include <linux/mutex.h>
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#include <linux/uaccess.h>
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#include <asm/cacheflush.h>
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#define NOP32_HI 0xc400
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#define NOP32_LO 0x4820
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#define BSR_LINK 0xe000
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void arch_jump_label_transform(struct jump_entry *entry,
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enum jump_label_type type)
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{
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unsigned long addr = jump_entry_code(entry);
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u16 insn[2];
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int ret = 0;
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if (type == JUMP_LABEL_JMP) {
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long offset = jump_entry_target(entry) - jump_entry_code(entry);
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if (WARN_ON(offset & 1 || offset < -67108864 || offset >= 67108864))
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return;
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offset = offset >> 1;
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insn[0] = BSR_LINK |
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((uint16_t)((unsigned long) offset >> 16) & 0x3ff);
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insn[1] = (uint16_t)((unsigned long) offset & 0xffff);
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} else {
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insn[0] = NOP32_HI;
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insn[1] = NOP32_LO;
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}
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ret = copy_to_kernel_nofault((void *)addr, insn, 4);
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WARN_ON(ret);
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flush_icache_range(addr, addr + 4);
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}
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void arch_jump_label_transform_static(struct jump_entry *entry,
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enum jump_label_type type)
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{
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/*
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* We use the same instructions in the arch_static_branch and
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* arch_static_branch_jump inline functions, so there's no
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* need to patch them up here.
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* The core will call arch_jump_label_transform when those
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* instructions need to be replaced.
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*/
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arch_jump_label_transform(entry, type);
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}
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@ -124,6 +124,10 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
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void __kprobes arch_remove_kprobe(struct kprobe *p)
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{
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if (p->ainsn.api.insn) {
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free_insn_slot(p->ainsn.api.insn, 0);
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p->ainsn.api.insn = NULL;
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}
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}
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static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
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@ -31,7 +31,7 @@ static void __init csky_memblock_init(void)
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unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 };
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signed long size;
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memblock_reserve(__pa(_stext), _end - _stext);
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memblock_reserve(__pa(_start), _end - _start);
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early_init_fdt_reserve_self();
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early_init_fdt_scan_reserved_mem();
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@ -78,7 +78,7 @@ void __init setup_arch(char **cmdline_p)
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pr_info("Phys. mem: %ldMB\n",
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(unsigned long) memblock_phys_mem_size()/1024/1024);
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setup_initial_init_mm(_stext, _etext, _edata, _end);
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setup_initial_init_mm(_start, _etext, _edata, _end);
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parse_early_param();
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@ -22,17 +22,13 @@ SECTIONS
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{
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. = PAGE_OFFSET + PHYS_OFFSET_OFFSET;
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_stext = .;
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__init_begin = .;
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_start = .;
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HEAD_TEXT_SECTION
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INIT_TEXT_SECTION(PAGE_SIZE)
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INIT_DATA_SECTION(PAGE_SIZE)
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PERCPU_SECTION(L1_CACHE_BYTES)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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.text : AT(ADDR(.text) - LOAD_OFFSET) {
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_text = .;
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_stext = .;
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VBR_BASE
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IRQENTRY_TEXT
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SOFTIRQENTRY_TEXT
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@ -48,7 +44,12 @@ SECTIONS
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/* __init_begin __init_end must be page aligned for free_initmem */
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. = ALIGN(PAGE_SIZE);
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__init_begin = .;
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INIT_TEXT_SECTION(PAGE_SIZE)
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INIT_DATA_SECTION(PAGE_SIZE)
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PERCPU_SECTION(L1_CACHE_BYTES)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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_sdata = .;
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RO_DATA(PAGE_SIZE)
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@ -27,7 +27,7 @@ static void flush_context(struct asid_info *info)
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u64 asid;
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/* Update the list of reserved ASIDs and the ASID bitmap. */
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bitmap_clear(info->map, 0, NUM_CTXT_ASIDS(info));
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bitmap_zero(info->map, NUM_CTXT_ASIDS(info));
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for_each_possible_cpu(i) {
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asid = atomic64_xchg_relaxed(&active_asid(info, i), 0);
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@ -178,8 +178,7 @@ int asid_allocator_init(struct asid_info *info,
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*/
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WARN_ON(NUM_CTXT_ASIDS(info) - 1 <= num_possible_cpus());
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atomic64_set(&info->generation, ASID_FIRST_VERSION(info));
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info->map = kcalloc(BITS_TO_LONGS(NUM_CTXT_ASIDS(info)),
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sizeof(*info->map), GFP_KERNEL);
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info->map = bitmap_zalloc(NUM_CTXT_ASIDS(info), GFP_KERNEL);
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if (!info->map)
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return -ENOMEM;
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