From a9ce1afb35317d2a0646c7530f0ae9822c93cd69 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 6 Oct 2014 11:37:56 +0200 Subject: [PATCH 01/15] ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property The L2 cache controller on the Armada 370 and Armada XP SoCs is a unified cache. Moreover, the Aurora cache controller is compatible with the L2x0 cache controller: the "cache-unified" property is required by its binding. This patch fixes the Aurora L2 cache node for the Armada 370 and Armada XP SoCs by adding this property. Reported-by: Sebastian Hesselbarth Signed-off-by: Gregory CLEMENT Acked-by: Sebastian Hesselbarth Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370.dtsi | 1 + arch/arm/boot/dts/armada-xp.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 6b3c23b1e138..7851942e244a 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -95,6 +95,7 @@ compatible = "marvell,aurora-outer-cache"; reg = <0x08000 0x1000>; cache-id-part = <0x100>; + cache-unified; wt-override; }; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index bff9f6c18db1..e1707133ee18 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -39,6 +39,7 @@ compatible = "marvell,aurora-system-cache"; reg = <0x08000 0x1000>; cache-id-part = <0x100>; + cache-unified; wt-override; }; From 3622daf85d2becdd99e1555f747dc6c4462b2d97 Mon Sep 17 00:00:00 2001 From: Arnaud Ebalard Date: Fri, 24 Oct 2014 23:22:01 +0200 Subject: [PATCH 02/15] arm: mvebu: Fix LED color in NETGEAR ReadyNAS 102 .dts file When writing initial .dts file for NETGEAR ReadyNAS 102, I put the wrong color for backup and SATA leds (green instead of blue for all three). Reported-by: Johan Kristell Signed-off-by: Arnaud Ebalard Acked-by: Andrew Lunn Acked-by: Gregory CLEMENT Link: https://lkml.kernel.org/r/4eb4049d934a3a8fe9f7235dafb6842422792566.1414185031.git.arno@natisbad.org Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370-netgear-rn102.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts index 3aebd93cc33c..f79579bdf8fe 100644 --- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts +++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts @@ -204,20 +204,20 @@ default-state = "keep"; }; - green-sata1-led { - label = "rn102:green:sata1"; + blue-sata1-led { + label = "rn102:blue:sata1"; gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; default-state = "on"; }; - green-sata2-led { - label = "rn102:green:sata2"; + blue-sata2-led { + label = "rn102:blue:sata2"; gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; default-state = "on"; }; - green-backup-led { - label = "rn102:green:backup"; + blue-backup-led { + label = "rn102:blue:backup"; gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; default-state = "on"; }; From 7bb2fe59f9f65bf66767b18dc338811df4b2c3e2 Mon Sep 17 00:00:00 2001 From: Arnaud Ebalard Date: Fri, 24 Oct 2014 23:22:16 +0200 Subject: [PATCH 03/15] arm: mvebu: Clarify (e)SATA ports info in NETGEAR ReadyNAS 102 .dts file On NETGEAR ReadyNAS 102, the two disks are connected to the external Marvell 88SE9170 SATA Controller connected to the PCIe bus. The rear eSATA port is connected to the native Armada 370 SATA controller. This patch updates the comments in .dts file wrt SATA interfaces and reduces the number of ports for native Armada 370 interface from 2 to 1. Signed-off-by: Arnaud Ebalard Acked-by: Andrew Lunn Acked-by: Gregory CLEMENT Link: https://lkml.kernel.org/r/4af680f9a68281755e31df2491f0590046138230.1414185031.git.arno@natisbad.org Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370-netgear-rn102.dts | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts index f79579bdf8fe..1e38628f4060 100644 --- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts +++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts @@ -35,7 +35,7 @@ pcie-controller { status = "okay"; - /* Connected to Marvell SATA controller */ + /* Connected to Marvell 88SE9170 SATA controller */ pcie@1,0 { /* Port 0, Lane 0 */ status = "okay"; @@ -53,8 +53,9 @@ status = "okay"; }; + /* eSATA interface */ sata@a0000 { - nr-ports = <2>; + nr-ports = <1>; status = "okay"; }; From 9a27b4495888f12a9361dacc8b673e384a50d144 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Sat, 25 Oct 2014 11:48:42 -0300 Subject: [PATCH 04/15] ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoC Now that the timer and watchdog drivers support the Armada 375 usage of the reference clock, we can enable it in the devicetree. Signed-off-by: Ezequiel Garcia Reviewed-by: Thomas Petazzoni Tested-by: Thomas Petazzoni Link: https://lkml.kernel.org/r/1414248522-16055-5-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-375.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index de6571445cef..9721e55384ce 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -36,6 +36,12 @@ #clock-cells = <0>; clock-frequency = <2000000000>; }; + /* 25 MHz reference crystal */ + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; }; cpus { @@ -366,13 +372,15 @@ <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <&mpic 5>, <&mpic 6>; - clocks = <&coreclk 0>; + clocks = <&coreclk 0>, <&refclk>; + clock-names = "nbclk", "fixed"; }; watchdog@20300 { compatible = "marvell,armada-375-wdt"; reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>; - clocks = <&coreclk 0>; + clocks = <&coreclk 0>, <&refclk>; + clock-names = "nbclk", "fixed"; }; cpurst@20800 { From ab3172efdb402cab9e33703f0d619c745295feb2 Mon Sep 17 00:00:00 2001 From: Arnaud Ebalard Date: Sat, 25 Oct 2014 17:32:42 +0200 Subject: [PATCH 05/15] ARM: mvebu: Enable rear eSATA ports of NETGEAR ReadyNAS 2120 NETGEAR ReadyNAS 2120 supports its four main SATA disks via 2 Marvell 88SE9170 SATA controllers connected on the PCIe bus of the the SoC. The two eSATA ports available at the rear of the device are handled by the native SATA controller of the Armada XP SoC powering the NAS. This patch enables the SoC SATA controller in the .dts file to make those two rear ports available. Signed-off-by: Arnaud Ebalard Acked-by: Andrew Lunn Link: https://lkml.kernel.org/r/f3876c7a9ef11eb758b9df18c671ee740b8be614.1414250947.git.arno@natisbad.org Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts index 7d8f32873e82..e3a8c456bb84 100644 --- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts +++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts @@ -137,6 +137,12 @@ }; }; + /* Two rear eSATA ports */ + sata@a0000 { + nr-ports = <2>; + status = "okay"; + }; + serial@12000 { status = "okay"; }; From 8c0ff7a1df5c765abf877d5f03af24c2c051c1f9 Mon Sep 17 00:00:00 2001 From: Claudio Leite Date: Fri, 31 Oct 2014 23:13:30 +0100 Subject: [PATCH 06/15] ARM: Kirkwood: Add support for DLink DIR665 Add a device tree description of the DLINK DIR665 wireless access point. The support for the 88E6171 switch will be added in a later patch. Signed-off-by: Claudio Leite Signed-off-by: Andrew Lunn Link: https://lkml.kernel.org/r/1414793613-11798-2-git-send-email-andrew@lunn.ch Signed-off-by: Jason Cooper --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/kirkwood-dir665.dts | 233 ++++++++++++++++++++++++++ 2 files changed, 234 insertions(+) create mode 100644 arch/arm/boot/dts/kirkwood-dir665.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 38c89cafa1ab..31529ccc67a0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -104,6 +104,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ kirkwood-d2net.dtb \ kirkwood-db-88f6281.dtb \ kirkwood-db-88f6282.dtb \ + kirkwood-dir665.dtb \ kirkwood-dns320.dtb \ kirkwood-dns325.dtb \ kirkwood-dockstar.dtb \ diff --git a/arch/arm/boot/dts/kirkwood-dir665.dts b/arch/arm/boot/dts/kirkwood-dir665.dts new file mode 100644 index 000000000000..d5ca9284db13 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-dir665.dts @@ -0,0 +1,233 @@ +/* + * Copyright (C) 2014 Claudio Leite + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "D-Link DIR-665"; + compatible = "dlink,dir-665", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; /* 128 MB */ + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + mbus { + pcie-controller { + status = "okay"; + + pcie@1,0 { + status = "okay"; + }; + }; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pinctrl-0 =< &pmx_led_usb + &pmx_led_internet_blue + &pmx_led_internet_amber + &pmx_led_5g &pmx_led_status_blue + &pmx_led_wps &pmx_led_status_amber + &pmx_led_24g + &pmx_btn_restart &pmx_btn_wps>; + pinctrl-names = "default"; + + pmx_led_usb: pmx-led-usb { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; + pmx_led_internet_blue: pmx-led-internet-blue { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + pmx_led_internet_amber: pmx-led-internet-amber { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + pmx_led_5g: pmx-led-5g { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + pmx_led_status_blue: pmx-led-status-blue { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + pmx_led_wps: pmx-led-wps { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + pmx_led_status_amber: pmx-led-status-amber { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + pmx_led_24g: pmx-led-24g { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; + pmx_btn_restart: pmx-btn-restart { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + pmx_btn_wps: pmx-btn-wps { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + }; + + spi@10600 { + status = "okay"; + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25l12805d"; + spi-max-frequency = <50000000>; + reg = <0>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "nvram"; + reg = <0x30000 0x10000>; + read-only; + }; + + partition@40000 { + label = "kernel"; + reg = <0x40000 0x180000>; + }; + + partition@1c0000 { + label = "rootfs"; + reg = <0x1c0000 0xe00000>; + }; + + cal_data: partition@fc0000 { + label = "cal_data"; + reg = <0xfc0000 0x10000>; + read-only; + }; + + partition@fd0000 { + label = "lang_pack"; + reg = <0xfd0000 0x30000>; + read-only; + }; + }; + }; + + serial@12000 { + status = "okay"; + }; + + i2c@11000 { + status = "okay"; + }; + + ehci@50000 { + status = "okay"; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + blue-usb { + label = "dir665:blue:usb"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + }; + blue-internet { + /* Can only be turned on if the Internet + * Ethernet port has Link + */ + label = "dir665:blue:internet"; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + }; + amber-internet { + label = "dir665:amber:internet"; + gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; + }; + blue-wifi5g { + label = "dir665:blue:5g"; + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + }; + blue-status { + label = "dir665:blue:status"; + gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; + }; + blue-wps { + label = "dir665:blue:wps"; + gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + }; + amber-status { + label = "dir665:amber:status"; + gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + }; + blue-24g { + label = "dir665:blue:24g"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; + }; + wps { + label = "wps"; + linux,code = ; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&mdio { + status = "okay"; +}; + +/* eth0 is connected to a Marvell 88E6171 switch, without a PHY. So set + * fixed speed and duplex. */ +ð0 { + status = "okay"; + + ethernet0-port@0 { + speed = <1000>; + duplex = <1>; + }; +}; + +/* eth1 is connected to the switch as well. However DSA only supports a + * single CPU port. So leave this port disabled to avoid confusion. */ + +ð1 { + status = "disabled"; +}; + +/* There is no battery on the boards, so the RTC does not keep time + * when there is no power, making it useless. */ +&rtc { + status = "disabled"; +}; From dd5dc02e679c33b74a918faff596a7381e6bce5e Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Fri, 31 Oct 2014 23:13:31 +0100 Subject: [PATCH 07/15] ARM: Kirkwood: DIR665: Instantiate Distributed Switch Architecture The DIR665 has an 8 port Ethernet Switch, a Marvell mv88e6171. Add a DSA node in DT, to instantiate DSA support for the 4 back panel ports, the Internet port, and the port to the CPU which is connected to eth0. Signed-off-by: Andrew Lunn Link: https://lkml.kernel.org/r/1414793613-11798-3-git-send-email-andrew@lunn.ch Signed-off-by: Jason Cooper --- arch/arm/boot/dts/kirkwood-dir665.dts | 45 +++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/boot/dts/kirkwood-dir665.dts b/arch/arm/boot/dts/kirkwood-dir665.dts index d5ca9284db13..786959ee9cbe 100644 --- a/arch/arm/boot/dts/kirkwood-dir665.dts +++ b/arch/arm/boot/dts/kirkwood-dir665.dts @@ -202,6 +202,51 @@ gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; }; }; + + dsa@0 { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + + dsa,ethernet = <ð0port>; + dsa,mii-bus = <&mdio>; + + switch@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0>; /* MDIO address 0, switch 0 in tree */ + + port@0 { + reg = <0>; + label = "lan4"; + }; + + port@1 { + reg = <1>; + label = "lan3"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan1"; + }; + + port@4 { + reg = <4>; + label = "wan"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + }; + }; + }; }; &mdio { From b324fa60ac94b9c00c59f621743715c036d134fa Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:07:09 +0200 Subject: [PATCH 08/15] ARM: mvebu: armada-xp: Consolidate pinctrl node All current Armada XP SoCs have their pin controller at 0x18000/0x38. Move the common properties of pinctrl nodes to armada-xp.dtsi to allow to share pinctrl settings later. Signed-off-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 7 ------- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 7 ------- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 7 ------- arch/arm/boot/dts/armada-xp.dtsi | 10 ++++++++++ 4 files changed, 10 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 2592e1c13560..b5933aa9ab50 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -169,13 +169,6 @@ internal-regs { pinctrl { compatible = "marvell,mv78230-pinctrl"; - reg = <0x18000 0x38>; - - sdio_pins: sdio-pins { - marvell,pins = "mpp30", "mpp31", "mpp32", - "mpp33", "mpp34", "mpp35"; - marvell,function = "sd0"; - }; }; gpio0: gpio@18100 { diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 480e237a870f..5954b362180c 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -253,13 +253,6 @@ internal-regs { pinctrl { compatible = "marvell,mv78260-pinctrl"; - reg = <0x18000 0x38>; - - sdio_pins: sdio-pins { - marvell,pins = "mpp30", "mpp31", "mpp32", - "mpp33", "mpp34", "mpp35"; - marvell,function = "sd0"; - }; }; gpio0: gpio@18100 { diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 2c7b1fef4703..735924d62e12 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -291,13 +291,6 @@ internal-regs { pinctrl { compatible = "marvell,mv78460-pinctrl"; - reg = <0x18000 0x38>; - - sdio_pins: sdio-pins { - marvell,pins = "mpp30", "mpp31", "mpp32", - "mpp33", "mpp34", "mpp35"; - marvell,function = "sd0"; - }; }; gpio0: gpio@18100 { diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index e1707133ee18..4010eee93df7 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -72,6 +72,16 @@ status = "disabled"; }; + pinctrl { + reg = <0x18000 0x38>; + + sdio_pins: sdio-pins { + marvell,pins = "mpp30", "mpp31", "mpp32", + "mpp33", "mpp34", "mpp35"; + marvell,function = "sd0"; + }; + }; + system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller"; reg = <0x18200 0x500>; From 264a05e19bf50f93f1a377e16497a626ae9f931e Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:12:00 +0200 Subject: [PATCH 09/15] ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address In other MVEBU SoCs, the pin controller node is called pin-ctrl with its base address added. Also, we have a node alias to access the pinctrl node easily. Fix this for Armada XP pinctrl nodes to be consistent with other SoCs. Signed-off-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-axpwifiap.dts | 2 +- arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 2 +- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 2 +- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 2 +- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 2 +- arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 2 +- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 2 +- arch/arm/boot/dts/armada-xp.dtsi | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts index a55a97a70505..546016148283 100644 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts @@ -60,7 +60,7 @@ }; internal-regs { - pinctrl { + pinctrl: pin-ctrl@18000 { pinctrl-0 = <&pmx_phy_int>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts index 469cf7137595..baa43a004299 100644 --- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts @@ -51,7 +51,7 @@ }; internal-regs { - pinctrl { + pinctrl: pin-ctrl@18000 { poweroff_pin: poweroff-pin { marvell,pins = "mpp24"; marvell,function = "gpio"; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index b5933aa9ab50..e24ef072b8cb 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -167,7 +167,7 @@ }; internal-regs { - pinctrl { + pinctrl: pin-ctrl@18000 { compatible = "marvell,mv78230-pinctrl"; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 5954b362180c..53dfb157b91a 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -251,7 +251,7 @@ }; internal-regs { - pinctrl { + pinctrl: pin-ctrl@18000 { compatible = "marvell,mv78260-pinctrl"; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 735924d62e12..8b4ab0a5d620 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -289,7 +289,7 @@ }; internal-regs { - pinctrl { + pinctrl: pin-ctrl@18000 { compatible = "marvell,mv78460-pinctrl"; }; diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts index e3a8c456bb84..e7949f482529 100644 --- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts +++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts @@ -55,7 +55,7 @@ }; internal-regs { - pinctrl { + pinctrl: pin-ctrl@18000 { poweroff: poweroff { marvell,pins = "mpp42"; marvell,function = "gpio"; diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 4e5a59ee1501..394f085751be 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -77,7 +77,7 @@ serial@12100 { status = "okay"; }; - pinctrl { + pinctrl: pin-ctrl@18000 { led_pins: led-pins-0 { marvell,pins = "mpp49", "mpp51", "mpp53"; marvell,function = "gpio"; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 4010eee93df7..aea7feecd953 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -72,7 +72,7 @@ status = "disabled"; }; - pinctrl { + pinctrl: pin-ctrl@18000 { reg = <0x18000 0x38>; sdio_pins: sdio-pins { From 01c434225ee67388711e78166cfe9b159e34fc9d Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:20:09 +0200 Subject: [PATCH 10/15] ARM: mvebu: armada-xp: Use pinctrl node alias Armada XP pinctrl node gained an alias, make use of it. Signed-off-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-axpwifiap.dts | 68 ++++---- .../boot/dts/armada-xp-lenovo-ix4-300d.dts | 62 +++---- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 8 +- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 +- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 8 +- .../arm/boot/dts/armada-xp-netgear-rn2120.dts | 164 +++++++++--------- .../boot/dts/armada-xp-openblocks-ax3-4.dts | 14 +- 7 files changed, 167 insertions(+), 165 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts index 546016148283..cdab007fbaf4 100644 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts @@ -60,40 +60,6 @@ }; internal-regs { - pinctrl: pin-ctrl@18000 { - pinctrl-0 = <&pmx_phy_int>; - pinctrl-names = "default"; - - pmx_ge0: pmx-ge0 { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp6", "mpp7", - "mpp8", "mpp9", "mpp10", "mpp11"; - marvell,function = "ge0"; - }; - - pmx_ge1: pmx-ge1 { - marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", - "mpp16", "mpp17", "mpp18", "mpp19", - "mpp20", "mpp21", "mpp22", "mpp23"; - marvell,function = "ge1"; - }; - - pmx_keys: pmx-keys { - marvell,pins = "mpp33"; - marvell,function = "gpio"; - }; - - pmx_spi: pmx-spi { - marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39"; - marvell,function = "spi"; - }; - - pmx_phy_int: pmx-phy-int { - marvell,pins = "mpp32"; - marvell,function = "gpio"; - }; - }; - serial@12000 { status = "okay"; }; @@ -162,3 +128,37 @@ }; }; }; + +&pinctrl { + pinctrl-0 = <&pmx_phy_int>; + pinctrl-names = "default"; + + pmx_ge0: pmx-ge0 { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + + pmx_ge1: pmx-ge1 { + marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19", + "mpp20", "mpp21", "mpp22", "mpp23"; + marvell,function = "ge1"; + }; + + pmx_keys: pmx-keys { + marvell,pins = "mpp33"; + marvell,function = "gpio"; + }; + + pmx_spi: pmx-spi { + marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39"; + marvell,function = "spi"; + }; + + pmx_phy_int: pmx-phy-int { + marvell,pins = "mpp32"; + marvell,function = "gpio"; + }; +}; diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts index baa43a004299..492cd8e3f424 100644 --- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts @@ -51,37 +51,6 @@ }; internal-regs { - pinctrl: pin-ctrl@18000 { - poweroff_pin: poweroff-pin { - marvell,pins = "mpp24"; - marvell,function = "gpio"; - }; - - power_button_pin: power-button-pin { - marvell,pins = "mpp44"; - marvell,function = "gpio"; - }; - - reset_button_pin: reset-button-pin { - marvell,pins = "mpp45"; - marvell,function = "gpio"; - }; - select_button_pin: select-button-pin { - marvell,pins = "mpp41"; - marvell,function = "gpio"; - }; - - scroll_button_pin: scroll-button-pin { - marvell,pins = "mpp42"; - marvell,function = "gpio"; - }; - - hdd_led_pin: hdd-led-pin { - marvell,pins = "mpp26"; - marvell,function = "gpio"; - }; - }; - serial@12000 { status = "okay"; }; @@ -282,3 +251,34 @@ gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; }; }; + +&pinctrl { + poweroff_pin: poweroff-pin { + marvell,pins = "mpp24"; + marvell,function = "gpio"; + }; + + power_button_pin: power-button-pin { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + reset_button_pin: reset-button-pin { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + select_button_pin: select-button-pin { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + + scroll_button_pin: scroll-button-pin { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + + hdd_led_pin: hdd-led-pin { + marvell,pins = "mpp26"; + marvell,function = "gpio"; + }; +}; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index e24ef072b8cb..281ccd24295c 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -167,10 +167,6 @@ }; internal-regs { - pinctrl: pin-ctrl@18000 { - compatible = "marvell,mv78230-pinctrl"; - }; - gpio0: gpio@18100 { compatible = "marvell,orion-gpio"; reg = <0x18100 0x40>; @@ -195,3 +191,7 @@ }; }; }; + +&pinctrl { + compatible = "marvell,mv78230-pinctrl"; +}; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 53dfb157b91a..d7a8d0b0f385 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -251,10 +251,6 @@ }; internal-regs { - pinctrl: pin-ctrl@18000 { - compatible = "marvell,mv78260-pinctrl"; - }; - gpio0: gpio@18100 { compatible = "marvell,orion-gpio"; reg = <0x18100 0x40>; @@ -298,3 +294,7 @@ }; }; }; + +&pinctrl { + compatible = "marvell,mv78260-pinctrl"; +}; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 8b4ab0a5d620..9c40c130d11a 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -289,10 +289,6 @@ }; internal-regs { - pinctrl: pin-ctrl@18000 { - compatible = "marvell,mv78460-pinctrl"; - }; - gpio0: gpio@18100 { compatible = "marvell,orion-gpio"; reg = <0x18100 0x40>; @@ -336,3 +332,7 @@ }; }; }; + +&pinctrl { + compatible = "marvell,mv78460-pinctrl"; +}; diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts index e7949f482529..d81430aa4ab3 100644 --- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts +++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts @@ -55,88 +55,6 @@ }; internal-regs { - pinctrl: pin-ctrl@18000 { - poweroff: poweroff { - marvell,pins = "mpp42"; - marvell,function = "gpio"; - }; - - power_button_pin: power-button-pin { - marvell,pins = "mpp27"; - marvell,function = "gpio"; - }; - - reset_button_pin: reset-button-pin { - marvell,pins = "mpp41"; - marvell,function = "gpio"; - }; - - sata1_led_pin: sata1-led-pin { - marvell,pins = "mpp31"; - marvell,function = "gpio"; - }; - - sata2_led_pin: sata2-led-pin { - marvell,pins = "mpp40"; - marvell,function = "gpio"; - }; - - sata3_led_pin: sata3-led-pin { - marvell,pins = "mpp44"; - marvell,function = "gpio"; - }; - - sata4_led_pin: sata4-led-pin { - marvell,pins = "mpp47"; - marvell,function = "gpio"; - }; - - sata1_power_pin: sata1-power-pin { - marvell,pins = "mpp24"; - marvell,function = "gpio"; - }; - - sata2_power_pin: sata2-power-pin { - marvell,pins = "mpp25"; - marvell,function = "gpio"; - }; - - sata3_power_pin: sata3-power-pin { - marvell,pins = "mpp26"; - marvell,function = "gpio"; - }; - - sata4_power_pin: sata4-power-pin { - marvell,pins = "mpp28"; - marvell,function = "gpio"; - }; - - sata1_pres_pin: sata1-pres-pin { - marvell,pins = "mpp32"; - marvell,function = "gpio"; - }; - - sata2_pres_pin: sata2-pres-pin { - marvell,pins = "mpp33"; - marvell,function = "gpio"; - }; - - sata3_pres_pin: sata3-pres-pin { - marvell,pins = "mpp34"; - marvell,function = "gpio"; - }; - - sata4_pres_pin: sata4-pres-pin { - marvell,pins = "mpp35"; - marvell,function = "gpio"; - }; - - err_led_pin: err-led-pin { - marvell,pins = "mpp45"; - marvell,function = "gpio"; - }; - }; - /* Two rear eSATA ports */ sata@a0000 { nr-ports = <2>; @@ -334,3 +252,85 @@ gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; }; }; + +&pinctrl { + poweroff: poweroff { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + + power_button_pin: power-button-pin { + marvell,pins = "mpp27"; + marvell,function = "gpio"; + }; + + reset_button_pin: reset-button-pin { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + + sata1_led_pin: sata1-led-pin { + marvell,pins = "mpp31"; + marvell,function = "gpio"; + }; + + sata2_led_pin: sata2-led-pin { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + + sata3_led_pin: sata3-led-pin { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + sata4_led_pin: sata4-led-pin { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + + sata1_power_pin: sata1-power-pin { + marvell,pins = "mpp24"; + marvell,function = "gpio"; + }; + + sata2_power_pin: sata2-power-pin { + marvell,pins = "mpp25"; + marvell,function = "gpio"; + }; + + sata3_power_pin: sata3-power-pin { + marvell,pins = "mpp26"; + marvell,function = "gpio"; + }; + + sata4_power_pin: sata4-power-pin { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + + sata1_pres_pin: sata1-pres-pin { + marvell,pins = "mpp32"; + marvell,function = "gpio"; + }; + + sata2_pres_pin: sata2-pres-pin { + marvell,pins = "mpp33"; + marvell,function = "gpio"; + }; + + sata3_pres_pin: sata3-pres-pin { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + + sata4_pres_pin: sata4-pres-pin { + marvell,pins = "mpp35"; + marvell,function = "gpio"; + }; + + err_led_pin: err-led-pin { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; +}; diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 394f085751be..6f6b0916df48 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -77,12 +77,7 @@ serial@12100 { status = "okay"; }; - pinctrl: pin-ctrl@18000 { - led_pins: led-pins-0 { - marvell,pins = "mpp49", "mpp51", "mpp53"; - marvell,function = "gpio"; - }; - }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -187,3 +182,10 @@ }; }; }; + +&pinctrl { + led_pins: led-pins-0 { + marvell,pins = "mpp49", "mpp51", "mpp53"; + marvell,function = "gpio"; + }; +}; From e59451432d7e0f7953e29c15e70111dfdbecc145 Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:24:34 +0200 Subject: [PATCH 11/15] ARM: mvebu: armada-xp: Move GE0/1 pinctrl settings for RGMII Pinctrl settings for GE0 and GE1 are not only usable on RD-AXPWiFiAP. Moreover, naming the RGMII settings pmx-ge{0,1} is not precise enough as there is also a GMII setting for GE0. Move the pinctrl sub-nodes to the common pinctrl node and rename them to pmx-ge{0,1}-rgmii. Signed-off-by: Sebastian Hesselbarth Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-axpwifiap.dts | 18 ++---------------- arch/arm/boot/dts/armada-xp.dtsi | 16 ++++++++++++++++ 2 files changed, 18 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts index cdab007fbaf4..0e53fad111de 100644 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts @@ -84,14 +84,14 @@ }; ethernet@70000 { - pinctrl-0 = <&pmx_ge0>; + pinctrl-0 = <&pmx_ge0_rgmii>; pinctrl-names = "default"; status = "okay"; phy = <&phy0>; phy-mode = "rgmii-id"; }; ethernet@74000 { - pinctrl-0 = <&pmx_ge1>; + pinctrl-0 = <&pmx_ge1_rgmii>; pinctrl-names = "default"; status = "okay"; phy = <&phy1>; @@ -133,20 +133,6 @@ pinctrl-0 = <&pmx_phy_int>; pinctrl-names = "default"; - pmx_ge0: pmx-ge0 { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp6", "mpp7", - "mpp8", "mpp9", "mpp10", "mpp11"; - marvell,function = "ge0"; - }; - - pmx_ge1: pmx-ge1 { - marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", - "mpp16", "mpp17", "mpp18", "mpp19", - "mpp20", "mpp21", "mpp22", "mpp23"; - marvell,function = "ge1"; - }; - pmx_keys: pmx-keys { marvell,pins = "mpp33"; marvell,function = "gpio"; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index aea7feecd953..06f25e2e0dd8 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -75,6 +75,22 @@ pinctrl: pin-ctrl@18000 { reg = <0x18000 0x38>; + pmx_ge0_rgmii: pmx-ge0-rgmii { + marvell,pins = + "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + + pmx_ge1_rgmii: pmx-ge1-rgmii { + marvell,pins = + "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19", + "mpp20", "mpp21", "mpp22", "mpp23"; + marvell,function = "ge1"; + }; + sdio_pins: sdio-pins { marvell,pins = "mpp30", "mpp31", "mpp32", "mpp33", "mpp34", "mpp35"; From 7254f6c52b5da38c0a79ab953d34e556fe16942f Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:27:55 +0200 Subject: [PATCH 12/15] ARM: mvebu: armada-xp: Add GE0 pinctrl settings for GMII There is a GMII setting for GE0, add it to the common pinctrl node. Signed-off-by: Sebastian Hesselbarth Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 06f25e2e0dd8..a3919b644737 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -75,6 +75,17 @@ pinctrl: pin-ctrl@18000 { reg = <0x18000 0x38>; + pmx_ge0_gmii: pmx-ge0-gmii { + marvell,pins = + "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", "mpp11", + "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19", + "mpp20", "mpp21", "mpp22", "mpp23"; + marvell,function = "ge0"; + }; + pmx_ge0_rgmii: pmx-ge0-rgmii { marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", From c06cf0a2c67710dc9dbf760c05c7c5b47b3b6aca Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:29:27 +0200 Subject: [PATCH 13/15] ARM: mvebu: armada-xp: Add RGMII pinctrl to Lenovo ix4-300d Lenovo ix4-300d has two ethernet PHYs connected via RGMII. Add the corresponding pinctrl settings. Signed-off-by: Sebastian Hesselbarth Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts index 492cd8e3f424..c5ee6c00766c 100644 --- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts @@ -66,12 +66,16 @@ }; ethernet@70000 { + pinctrl-0 = <&pmx_ge0_rgmii>; + pinctrl-names = "default"; status = "okay"; phy = <&phy0>; phy-mode = "rgmii-id"; }; ethernet@74000 { + pinctrl-0 = <&pmx_ge1_rgmii>; + pinctrl-names = "default"; status = "okay"; phy = <&phy1>; phy-mode = "rgmii-id"; From 7207cef47dcd28b2f2fdfe9dc2e1fb5b5eeea75b Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:34:11 +0200 Subject: [PATCH 14/15] ARM: mvebu: armada-xp: Add I2C eeprom on Lenovo ix4-300d There is an I2C eeprom connected on Lenovo ix4-300d, add the corresponding node. Signed-off-by: Sebastian Hesselbarth Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts index c5ee6c00766c..1a85014a6268 100644 --- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts @@ -98,6 +98,11 @@ reg = <0x2e>; }; + eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + pcf8563@51 { compatible = "nxp,pcf8563"; reg = <0x51>; From f5ed9ccc4c2dc275a13b765c88fa13211f60b57f Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:41:37 +0200 Subject: [PATCH 15/15] ARM: mvebu: armada-xp: Fix 74hc595 count for Lenovo ix4-300d There is only one 74hc595 connected to GPIO but two were given in the registers-number property. Fix it up. Signed-off-by: Sebastian Hesselbarth Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts index 1a85014a6268..aa5463c91924 100644 --- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts @@ -204,7 +204,7 @@ gpio-controller; #gpio-cells = <2>; reg = <0>; - registers-number = <2>; + registers-number = <1>; spi-max-frequency = <100000>; }; };