ARM: dts: mt8127: correct uart instance address
The instance address for uart nodes are incorrect. Correct them. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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cfb1167126
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@ -107,7 +107,7 @@
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<0 0x10216000 0 0x2000>;
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<0 0x10216000 0 0x2000>;
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};
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};
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uart0: serial@11006000 {
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uart0: serial@11002000 {
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compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
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compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
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reg = <0 0x11002000 0 0x400>;
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reg = <0 0x11002000 0 0x400>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
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@ -115,7 +115,7 @@
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status = "disabled";
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status = "disabled";
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};
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};
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uart1: serial@11007000 {
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uart1: serial@11003000 {
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compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
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compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
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reg = <0 0x11003000 0 0x400>;
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reg = <0 0x11003000 0 0x400>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
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@ -123,7 +123,7 @@
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status = "disabled";
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status = "disabled";
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};
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};
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uart2: serial@11008000 {
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uart2: serial@11004000 {
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compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
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compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
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reg = <0 0x11004000 0 0x400>;
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reg = <0 0x11004000 0 0x400>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
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@ -131,7 +131,7 @@
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status = "disabled";
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status = "disabled";
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};
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};
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uart3: serial@11009000 {
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uart3: serial@11005000 {
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compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
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compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
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reg = <0 0x11005000 0 0x400>;
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reg = <0 0x11005000 0 0x400>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
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