net/mlx5e: Rename ICOSQ WQE info struct and field
Structs mlx5e_txqsq and mlx5e_xdpsq contain wqe_info arrays to store supplementary information corresponding to WQEs in the queue. Struct mlx5e_icosq also has such an array, but it's called differently - ico_wqe. This patch renames it to unify with the other SQs. In addition, rename the struct to emphasize its specific usage. Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com> Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -370,7 +370,7 @@ enum {
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MLX5E_SQ_STATE_PENDING_XSK_TX,
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};
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struct mlx5e_sq_wqe_info {
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struct mlx5e_icosq_wqe_info {
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u8 opcode;
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u8 num_wqebbs;
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@ -552,7 +552,7 @@ struct mlx5e_icosq {
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/* write@xmit, read@completion */
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struct {
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struct mlx5e_sq_wqe_info *ico_wqe;
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struct mlx5e_icosq_wqe_info *wqe_info;
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} db;
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/* read only */
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@ -1027,17 +1027,17 @@ static void mlx5e_free_xdpsq(struct mlx5e_xdpsq *sq)
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static void mlx5e_free_icosq_db(struct mlx5e_icosq *sq)
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{
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kvfree(sq->db.ico_wqe);
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kvfree(sq->db.wqe_info);
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}
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static int mlx5e_alloc_icosq_db(struct mlx5e_icosq *sq, int numa)
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{
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int wq_sz = mlx5_wq_cyc_get_size(&sq->wq);
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size_t size;
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sq->db.ico_wqe = kvzalloc_node(array_size(wq_sz,
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sizeof(*sq->db.ico_wqe)),
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GFP_KERNEL, numa);
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if (!sq->db.ico_wqe)
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size = array_size(wq_sz, sizeof(*sq->db.wqe_info));
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sq->db.wqe_info = kvzalloc_node(size, GFP_KERNEL, numa);
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if (!sq->db.wqe_info)
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return -ENOMEM;
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return 0;
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@ -472,7 +472,7 @@ static inline void mlx5e_fill_icosq_frag_edge(struct mlx5e_icosq *sq,
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struct mlx5_wq_cyc *wq,
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u16 pi, u16 nnops)
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{
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struct mlx5e_sq_wqe_info *edge_wi, *wi = &sq->db.ico_wqe[pi];
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struct mlx5e_icosq_wqe_info *edge_wi, *wi = &sq->db.wqe_info[pi];
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edge_wi = wi + nnops;
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@ -527,9 +527,9 @@ static int mlx5e_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)
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MLX5_OPCODE_UMR);
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umr_wqe->uctrl.xlt_offset = cpu_to_be16(xlt_offset);
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sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_UMR;
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sq->db.ico_wqe[pi].num_wqebbs = MLX5E_UMR_WQEBBS;
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sq->db.ico_wqe[pi].umr.rq = rq;
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sq->db.wqe_info[pi].opcode = MLX5_OPCODE_UMR;
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sq->db.wqe_info[pi].num_wqebbs = MLX5E_UMR_WQEBBS;
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sq->db.wqe_info[pi].umr.rq = rq;
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sq->pc += MLX5E_UMR_WQEBBS;
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sq->doorbell_cseg = &umr_wqe->ctrl;
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@ -618,13 +618,13 @@ int mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
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wqe_counter = be16_to_cpu(cqe->wqe_counter);
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do {
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struct mlx5e_sq_wqe_info *wi;
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struct mlx5e_icosq_wqe_info *wi;
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u16 ci;
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last_wqe = (sqcc == wqe_counter);
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ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sqcc);
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wi = &sq->db.ico_wqe[ci];
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wi = &sq->db.wqe_info[ci];
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sqcc += wi->num_wqebbs;
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if (last_wqe && unlikely(get_cqe_opcode(cqe) != MLX5_CQE_REQ)) {
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@ -78,8 +78,8 @@ void mlx5e_trigger_irq(struct mlx5e_icosq *sq)
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struct mlx5e_tx_wqe *nopwqe;
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u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
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sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
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sq->db.ico_wqe[pi].num_wqebbs = 1;
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sq->db.wqe_info[pi].opcode = MLX5_OPCODE_NOP;
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sq->db.wqe_info[pi].num_wqebbs = 1;
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nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc);
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mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &nopwqe->ctrl);
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}
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