arm64: dts: broadcom: Fix I2C and SPI bus warnings
dtc has new checks for I2C and SPI buses. Fix the warnings in node names and unit-addresses. arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (i2c_bus_reg): /hsls/i2c@e0000/pcf8574@20: I2C bus unit address format error, expected "27" arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dtb: Warning (i2c_bus_reg): /hsls/i2c@e0000/pcf8574@20: I2C bus unit address format error, expected "27" arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (spi_bus_bridge): /hsls/ssp@180000: node name for SPI buses should be 'spi' arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (spi_bus_bridge): /hsls/ssp@190000: node name for SPI buses should be 'spi' Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Jon Mason <jonmason@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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@ -639,7 +639,7 @@
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status = "disabled";
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status = "disabled";
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};
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};
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ssp0: ssp@66180000 {
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ssp0: spi@66180000 {
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compatible = "arm,pl022", "arm,primecell";
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x66180000 0x1000>;
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reg = <0x66180000 0x1000>;
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interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
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@ -650,7 +650,7 @@
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status = "disabled";
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status = "disabled";
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};
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};
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ssp1: ssp@66190000 {
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ssp1: spi@66190000 {
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compatible = "arm,pl022", "arm,primecell";
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x66190000 0x1000>;
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reg = <0x66190000 0x1000>;
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interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
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@ -138,7 +138,7 @@
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&i2c1 {
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&i2c1 {
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status = "okay";
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status = "okay";
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pcf8574: pcf8574@20 {
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pcf8574: pcf8574@27 {
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compatible = "nxp,pcf8574a";
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compatible = "nxp,pcf8574a";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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@ -521,7 +521,7 @@
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status = "disabled";
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status = "disabled";
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};
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};
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ssp0: ssp@180000 {
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ssp0: spi@180000 {
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compatible = "arm,pl022", "arm,primecell";
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x00180000 0x1000>;
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reg = <0x00180000 0x1000>;
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interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
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@ -533,7 +533,7 @@
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status = "disabled";
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status = "disabled";
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};
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};
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ssp1: ssp@190000 {
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ssp1: spi@190000 {
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compatible = "arm,pl022", "arm,primecell";
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x00190000 0x1000>;
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reg = <0x00190000 0x1000>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
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