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carl9170: fix timekeeping for HW_COUNTER firmwares 

AR9170_PWR_REG_PLL_ADDAC is used to set the main clock
divisor which affects the AHB/CPU speed. Because this
would interfere with the firmware internal timekeeping,
the function has to be moved into the firmware.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Christian Lamparter 2011-08-15 18:45:54 +02:00 committed by John W. Linville
parent bfe2ed8f4d
commit 7ccc83b0fc
3 changed files with 8 additions and 5 deletions
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1
drivers/net/wireless/ath/carl9170/carl9170.h
View File

@ -282,6 +282,7 @@ struct ar9170 {
bool rx_stream; bool rx_stream;
bool tx_stream; bool tx_stream;
bool rx_filter; bool rx_filter;
bool hw_counters;
unsigned int mem_blocks; unsigned int mem_blocks;
unsigned int mem_block_size; unsigned int mem_block_size;
unsigned int rx_size; unsigned int rx_size;

3
drivers/net/wireless/ath/carl9170/fw.c
View File

@ -266,6 +266,9 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)
FIF_PROMISC_IN_BSS; FIF_PROMISC_IN_BSS;
} }
if (SUPP(CARL9170FW_HW_COUNTERS))
ar->fw.hw_counters = true;
if (SUPP(CARL9170FW_WOL)) if (SUPP(CARL9170FW_WOL))
device_set_wakeup_enable(&ar->udev->dev, true); device_set_wakeup_enable(&ar->udev->dev, true);

9
drivers/net/wireless/ath/carl9170/phy.c
View File

@ -578,11 +578,10 @@ static int carl9170_init_phy(struct ar9170 *ar, enum ieee80211_band band)
if (err) if (err)
return err; return err;
/* XXX: remove magic! */ if (!ar->fw.hw_counters) {
if (is_2ghz) err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC,
err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 0x5163); is_2ghz ? 0x5163 : 0x5143);
else }
err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 0x5143);
return err; return err;
} }