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mlxsw: reg: Update RATR to support IP-in-IP tunnels 

So far, adjacencies have always been of type Ethernet (with value of 0),
and thus there was no need to explicitly support RATR type. However to
support IP-in-IP adjacencies, this type and a suite of IP-in-IP-specific
attributes need to be added.

Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Petr Machata 2017-09-02 23:49:10 +02:00 committed by David S. Miller
parent 99ae8e3e5e
commit 7c819de438
1 changed files with 66 additions and 0 deletions
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66
drivers/net/ethernet/mellanox/mlxsw/reg.h
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@ -4362,6 +4362,38 @@ MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1);
*/ */
MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1); MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1);
enum mlxsw_reg_ratr_type {
/* Ethernet */
MLXSW_REG_RATR_TYPE_ETHERNET,
/* IPoIB Unicast without GRH.
* Reserved for Spectrum.
*/
MLXSW_REG_RATR_TYPE_IPOIB_UC,
/* IPoIB Unicast with GRH. Supported only in table 0 (Ethernet unicast
* adjacency).
* Reserved for Spectrum.
*/
MLXSW_REG_RATR_TYPE_IPOIB_UC_W_GRH,
/* IPoIB Multicast.
* Reserved for Spectrum.
*/
MLXSW_REG_RATR_TYPE_IPOIB_MC,
/* MPLS.
* Reserved for SwitchX/-2.
*/
MLXSW_REG_RATR_TYPE_MPLS,
/* IPinIP Encap.
* Reserved for SwitchX/-2.
*/
MLXSW_REG_RATR_TYPE_IPIP,
};
/* reg_ratr_type
* Adjacency entry type.
* Access: RW
*/
MLXSW_ITEM32(reg, ratr, type, 0x04, 28, 4);
/* reg_ratr_adjacency_index_low /* reg_ratr_adjacency_index_low
* Bits 15:0 of index into the adjacency table. * Bits 15:0 of index into the adjacency table.
* For SwitchX and SwitchX-2, the adjacency table is linear and * For SwitchX and SwitchX-2, the adjacency table is linear and
@ -4416,6 +4448,34 @@ MLXSW_ITEM32(reg, ratr, trap_id, 0x0C, 0, 8);
*/ */
MLXSW_ITEM_BUF(reg, ratr, eth_destination_mac, 0x12, 6); MLXSW_ITEM_BUF(reg, ratr, eth_destination_mac, 0x12, 6);
enum mlxsw_reg_ratr_ipip_type {
/* IPv4, address set by mlxsw_reg_ratr_ipip_ipv4_udip. */
MLXSW_REG_RATR_IPIP_TYPE_IPV4,
/* IPv6, address set by mlxsw_reg_ratr_ipip_ipv6_ptr. */
MLXSW_REG_RATR_IPIP_TYPE_IPV6,
};
/* reg_ratr_ipip_type
* Underlay destination ip type.
* Note: the type field must match the protocol of the router interface.
* Access: RW
*/
MLXSW_ITEM32(reg, ratr, ipip_type, 0x10, 16, 4);
/* reg_ratr_ipip_ipv4_udip
* Underlay ipv4 dip.
* Reserved when ipip_type is IPv6.
* Access: RW
*/
MLXSW_ITEM32(reg, ratr, ipip_ipv4_udip, 0x18, 0, 32);
/* reg_ratr_ipip_ipv6_ptr
* Pointer to IPv6 underlay destination ip address.
* For Spectrum: Pointer to KVD linear space.
* Access: RW
*/
MLXSW_ITEM32(reg, ratr, ipip_ipv6_ptr, 0x1C, 0, 24);
static inline void static inline void
mlxsw_reg_ratr_pack(char *payload, mlxsw_reg_ratr_pack(char *payload,
enum mlxsw_reg_ratr_op op, bool valid, enum mlxsw_reg_ratr_op op, bool valid,
@ -4435,6 +4495,12 @@ static inline void mlxsw_reg_ratr_eth_entry_pack(char *payload,
mlxsw_reg_ratr_eth_destination_mac_memcpy_to(payload, dest_mac); mlxsw_reg_ratr_eth_destination_mac_memcpy_to(payload, dest_mac);
} }
static inline void mlxsw_reg_ratr_ipip4_entry_pack(char *payload, u32 ipv4_udip)
{
mlxsw_reg_ratr_ipip_type_set(payload, MLXSW_REG_RATR_IPIP_TYPE_IPV4);
mlxsw_reg_ratr_ipip_ipv4_udip_set(payload, ipv4_udip);
}
/* RICNT - Router Interface Counter Register /* RICNT - Router Interface Counter Register
* ----------------------------------------- * -----------------------------------------
* The RICNT register retrieves per port performance counters * The RICNT register retrieves per port performance counters